JPS62183142A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS62183142A
JPS62183142A JP2437086A JP2437086A JPS62183142A JP S62183142 A JPS62183142 A JP S62183142A JP 2437086 A JP2437086 A JP 2437086A JP 2437086 A JP2437086 A JP 2437086A JP S62183142 A JPS62183142 A JP S62183142A
Authority
JP
Japan
Prior art keywords
film
heat treatment
bpsg
substrate
silicon nitride
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2437086A
Other languages
Japanese (ja)
Inventor
Hideto Ozaki
尾崎 秀人
Masafumi Shishino
宍野 政文
Shuichi Mayumi
周一 真弓
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP2437086A priority Critical patent/JPS62183142A/en
Publication of JPS62183142A publication Critical patent/JPS62183142A/en
Pending legal-status Critical Current

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  • Local Oxidation Of Silicon (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To form a contact diffused layer without erasing a fine contact hole by melting (flowing) a BPAG film in steam before opening the hole to sufficiently flatten the surface of a substrate. CONSTITUTION:An LOCOS film 2 formed on a silicon substrate 1, a gate oxide film 3 and a polycrystalline silicon gate layer 4 are formed. A silicon nitride film 6 is deposited on the entire substrate surface of a sample formed with a diffused layer 5 in the substrate 1 at both sides of the layer 4. Then, a BPSG film 7 is deposited on the film 6. Subsequently, a heat treatment is executed in steam for the purpose of shrink-fitting and melting the film 7. Thereafter, with a photoresist as a mask a contact hole 9 is opened by etching. Then, a heat treatment is performed in an atmosphere including phosphine (PH3) to melt second the film 7 and to form the contact diffused layer.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は半導体装置の製造方法、特に段差構造を有する
基板面をボロンリンケイ酸ガラス(以下、BPSGと略
す)膜被覆により平坦化する方法に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for flattening a substrate surface having a step structure by coating with a boron phosphosilicate glass (hereinafter abbreviated as BPSG) film.

従来の技術 リンケイ酸ガラス(以下、PSGと略す)の溶融(リフ
ロー)による平坦化は、従来より行われているが、PS
Gのりフロ一温度が1oQo℃以上と高いために、この
処理工程で例えばMO3型素子のソース、ドレイン拡散
層の不純物の拡散深さが深くなり、素子のチャネル長が
2μm以下の超LSI等で必要となる短チャネル長の精
密制御などを実現するのは困難である。
Conventional technology Flattening by melting (reflow) phosphosilicate glass (hereinafter abbreviated as PSG) has been conventionally performed, but PSG
Because the G glue flow temperature is as high as 1oQo°C or more, this process increases the depth of impurity diffusion in the source and drain diffusion layers of MO3 type devices, for example, and is difficult to use in ultra-LSI devices with channel lengths of 2 μm or less. It is difficult to achieve the necessary precision control of short channel lengths.

一方、PSGの燐濃度を増すことでPSGのりフロ一温
度を下げることもできるが、燐濃度を増すことは半導体
装置の信頼性の低下をまねく等の不都合がある。この様
な問題を解決できる方法として、近年、PSGに代わり
1000℃以下の低温でも溶融()、ロー)するBPS
Gが注目されている。
On the other hand, the PSG adhesive flow temperature can be lowered by increasing the phosphorus concentration of PSG, but increasing the phosphorus concentration has disadvantages such as lowering the reliability of the semiconductor device. In recent years, as a method to solve these problems, BPS, which melts even at low temperatures below 1000°C, has been introduced instead of PSG.
G is attracting attention.

従来のBPSGのフローを採用したチャネルMO3型半
導体装置の製造工程を第2図(a)〜(、)を参照して
説明する。まず、第2図(−)に示すようにシリコン基
板1の上に選択酸化(LOCO3)膜2.ゲート酸化膜
3.多結晶シリコンゲート層4.拡散層5を形成し、さ
らに基板表面全域に窒化シリコン膜6を堆積する。
The manufacturing process of a channel MO3 type semiconductor device employing a conventional BPSG flow will be described with reference to FIGS. First, as shown in FIG. 2(-), a selective oxidation (LOCO3) film 2. Gate oxide film 3. Polycrystalline silicon gate layer 4. A diffusion layer 5 is formed, and a silicon nitride film 6 is further deposited over the entire surface of the substrate.

次に第2図(b) K示すように例えばボロン濃度3重
量%、燐濃度4重量係のBPSG膜7を堆積し、BPS
G膜を焼きしめるため酸素ガス中、900℃で60分間
の熱処理(フロー)を施す。引き続き第2図(c)に示
すようにBPSG膜7と窒化シリコン膜6にコンタクト
孔9を開孔する。次に第2図(d)K示すようにフォス
フイン(PH3)を含む酸素ガス中、950’Cで10
分間の熱処理を施す。この熱処理によりBPSG膜7は
再び溶融(リフロー)され平坦化できると同時に、重金
属やNa等がリンゲッタされるため半導体素子特性の信
頼性が向上する・また、コンタクト孔内のシリコン基板
にリンが深く熱拡散されるため拡散が浅い場合に、アル
ミニウム配線時にアルミニウム電極とシリコン基板の合
金化によって生じたスパイクに起因する接合の破壊にと
もなうコンタクト部でのリーク電流の発生も抑制される
Next, as shown in FIG. 2(b) K, a BPSG film 7 with, for example, a boron concentration of 3% by weight and a phosphorus concentration of 4% by weight is deposited.
In order to bake the G film, heat treatment (flow) is performed at 900° C. for 60 minutes in oxygen gas. Subsequently, as shown in FIG. 2(c), contact holes 9 are formed in the BPSG film 7 and the silicon nitride film 6. Next, as shown in Fig. 2(d)K, in oxygen gas containing phosphine (PH3), 10
Apply heat treatment for 1 minute. Through this heat treatment, the BPSG film 7 can be remelted (reflowed) and flattened, and at the same time, heavy metals, Na, etc. are removed as phosphorus, improving the reliability of the semiconductor device characteristics.In addition, the BPSG film 7 can be re-melted (reflowed) and flattened, and at the same time, the reliability of the semiconductor device characteristics is improved because heavy metals, Na, etc. are phosphorus-gettered. Because of thermal diffusion, if the diffusion is shallow, the occurrence of leakage current at the contact portion due to junction breakdown due to spikes caused by alloying of the aluminum electrode and silicon substrate during aluminum wiring is also suppressed.

この後、第2図(、)に示すようにリフロ一工程でシリ
コン露出面に形成された酸化膜を除去し、最後にアルミ
ニウム配線8を形成することによりnチャネルMO3型
トランジスタが完成する。
Thereafter, as shown in FIG. 2(a), the oxide film formed on the exposed silicon surface is removed in a reflow process, and finally an aluminum wiring 8 is formed to complete an n-channel MO3 type transistor.

発明が解決しようとする問題点 しかしながら、この場合はBPSG膜に開孔した微細な
コンタクト孔がリフロ一工程の熱処理の際にBPSGの
溶融によって消滅することがしばしばある。
Problems to be Solved by the Invention However, in this case, fine contact holes formed in the BPSG film often disappear due to melting of the BPSG during heat treatment in the reflow step.

BPSG膜のボロン濃度や燐濃度を低くし、リフローの
程度を抑えることでコンタクト孔の消滅を防止できるか
、フロ一工程においてBPSG膜を充分に平坦化するこ
とができない。一方、BPSG膜のりフローを抑えるた
めにす70一工程の熱処理湯度を下げることや熱処理時
間を短くした場合、重金属等のリンゲッタ効果が小さく
なり、半導体素子の特性が劣化するという問題が生じる
Either it is possible to prevent the contact hole from disappearing by lowering the boron concentration or phosphorus concentration of the BPSG film and suppressing the degree of reflow, or the BPSG film cannot be sufficiently planarized in a single flow process. On the other hand, when lowering the heat treatment temperature or shortening the heat treatment time in step 70 in order to suppress the flow of the BPSG film, the problem arises that the ring getter effect of heavy metals etc. is reduced and the characteristics of the semiconductor element are deteriorated.

問題点を解決するための手段 前記問題点を解決するため本発明は、半導体装置の所望
の領域に窒化シリコン膜を被着する工程と、前記窒化シ
リコン膜上にボロンリンケイ酸ガラス膜を堆積する工程
と、前記ボロンリンケイ酸ガラス膜を水蒸気で熱処理す
る工程と、上記ボロンリンケイ酸ガラス膜および上記窒
化シリコン膜にコンタクト孔を開孔する工程と、燐化合
物を含むガス雰囲気中で熱処理する工程を有することを
特徴とする半導体装置の製造方法を提供する。
Means for Solving the Problems In order to solve the above problems, the present invention provides a step of depositing a silicon nitride film on a desired region of a semiconductor device, and a step of depositing a boron phosphosilicate glass film on the silicon nitride film. and a step of heat treating the boron phosphosilicate glass film with water vapor, a step of forming contact holes in the boron phosphosilicate glass film and the silicon nitride film, and a step of heat treating the boron phosphosilicate glass film in a gas atmosphere containing a phosphorus compound. A method for manufacturing a semiconductor device with features is provided.

作  用 上記手段によれば、BPSG膜のフローが水蒸気雰囲気
であるため充分な平坦化が可能であシ、またフローの熱
処理中にボロン(B)やリン(P) (特にB)の外方
拡散が進み、フロ一工程終了後はBPSG中のBやP(
特にB)濃度が低減する。このため、す70一工程にお
いて熱処理条件を変更せず、BPSG膜の溶融が抑制さ
れBPSG膜に開孔した微細なコンタクト孔が消滅する
ことなく、コンタクト孔の上端部に適当なりフロー形状
が得られる。
Effect According to the above means, sufficient flattening is possible because the flow of the BPSG film is in a water vapor atmosphere, and during the heat treatment of the flow, boron (B) and phosphorus (P) (particularly B) are removed from the outside. As the diffusion progresses, B and P in BPSG (
In particular, B) the concentration decreases. Therefore, without changing the heat treatment conditions in step 70, the melting of the BPSG film is suppressed, the fine contact holes opened in the BPSG film do not disappear, and an appropriate flow shape can be obtained at the upper end of the contact hole. It will be done.

実施例 以下、本発明にかかるMO8型半導体集積回路の製造方
法の一実施例について述べる。なお、簡明化のために一
個のMO3型トランジスタ部を拡大して示した第1図会
参照し説明する。
EXAMPLE An example of the method for manufacturing an MO8 type semiconductor integrated circuit according to the present invention will be described below. For the sake of simplicity, the description will be made with reference to FIG. 1, which shows an enlarged view of one MO3 type transistor section.

まず、第1図体)に示すようにシリコン基板1の上に形
成したLOGO8膜2.ゲート酸化膜3゜多結晶シリコ
ンゲート層4を有し、さらに多結晶シリコンゲート層4
の両側の基板1内に拡散層6を形成した試料に、基板表
面全域に例えば膜厚1000Aの窒化シリコンM6を堆
積する。次に第1図(ロ)に示すように、ボロン濃度3
重量%、燐濃度4重量%、膜厚8000A+7)BPS
G膜7を前記窒化シリコン膜6上に堆積する。
First, as shown in Figure 1), a LOGO8 film 2. is formed on a silicon substrate 1. The gate oxide film 3 has a polycrystalline silicon gate layer 4, and further has a polycrystalline silicon gate layer 4.
For example, silicon nitride M6 having a thickness of 1000 Å is deposited over the entire substrate surface on a sample in which diffusion layers 6 are formed in the substrate 1 on both sides of the substrate. Next, as shown in Figure 1 (b), boron concentration 3
Weight%, phosphorus concentration 4% by weight, film thickness 8000A+7) BPS
A G film 7 is deposited on the silicon nitride film 6.

これに続いて、第1図(C)K示すようにBPSG膜7
の焼きしめと溶融(フロー)を目的として水蒸気中にて
900″C,6o分間の熱処理を施す。
Following this, as shown in FIG. 1(C)K, the BPSG film 7 is
For the purpose of hardening and melting (flow), heat treatment is performed in steam at 900''C for 60 minutes.

この後第1図(d)に示すようにホトレジストをマスク
にしてエツチングを行いコンタクト孔9を開孔する。次
に第1図(6m) K示すように、BPSG膜702回
目の溶融(リフロー)とコンタクト拡散層の形成のため
、フォスフイン(PH3)を含む雰囲気中、960°C
で10分間熱処理する。この熱処理過程でシリコン露出
面に酸化膜が形成されるので、酸化膜を除去した後、ア
ルミニウム配線8を形成する。以上でnチャネルMO3
型トランジスタが完成する。
Thereafter, as shown in FIG. 1(d), etching is performed using a photoresist as a mask to open a contact hole 9. Next, as shown in Figure 1 (6m) K, for the second melting (reflow) of the BPSG film 70 and the formation of a contact diffusion layer, it was heated at 960°C in an atmosphere containing phosphine (PH3).
Heat-treat for 10 minutes. During this heat treatment process, an oxide film is formed on the exposed silicon surface, so after removing the oxide film, the aluminum wiring 8 is formed. Above is n channel MO3
type transistor is completed.

以上の実施例では、コンタクト孔の開孔前に水蒸気中で
BPSGi膜の溶融(フロー)を行うため、ボロン濃度
、燐濃度を低く抑えたBPSG膜でも充分に平坦化する
とともに、この水蒸気熱処理過程においてはボロンの外
方拡散がドライ酸素ガス雰囲気の場合よりも進行するた
め、フロー終了後BPSGのB、P濃度が低減する。そ
の結果、リフロ一工程でのBPSGの溶融は適度に抑制
されるため微細なコンタクト孔は消滅しない。BPSG
膜の平坦化、コンタクト孔の微細化、コンタクト拡散層
の形成という矛盾した条件を本発明で解決できる。
In the above embodiment, since the BPSGi film is melted (flowed) in water vapor before forming the contact hole, even the BPSG film with low boron and phosphorus concentrations can be sufficiently flattened, and the water vapor heat treatment process In this case, the outward diffusion of boron progresses more than in the case of a dry oxygen gas atmosphere, so the B and P concentrations of the BPSG decrease after the flow ends. As a result, the melting of BPSG in one reflow process is moderately suppressed, so that fine contact holes do not disappear. BPSG
The present invention can resolve the contradictory conditions of film flattening, contact hole miniaturization, and contact diffusion layer formation.

本発明はMOS型集、積回路の製造を例示して説明した
が、本発明はBPSG膜のりフローが必要な半導体装置
全般に応用できるものである。
Although the present invention has been explained by exemplifying the manufacture of MOS type integrated circuits, the present invention can be applied to all semiconductor devices requiring a BPSG film bonding flow.

発明の効果 本発明によれば、BPSG膜を用いて基板表面、  を
充分に平坦にし、微細なコンタクト孔も消滅させること
なく、コンタクト拡散層を形成できる・以上のように、
本発明は、従来のBPSG膜の溶融熱処理で発生した不
都合を除くことができ、高集積半導体装置の製造に大き
く寄与する。
Effects of the Invention According to the present invention, a contact diffusion layer can be formed by using a BPSG film to sufficiently flatten the substrate surface and without eliminating even minute contact holes.As described above,
The present invention can eliminate the inconveniences caused by conventional melting heat treatment of BPSG films, and greatly contributes to the production of highly integrated semiconductor devices.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(−)〜(e)は本発明の一実施例を説明するた
めの工程断面図、第2図(a)〜(e)は従来技術を説
明するための工程断面図である。 1・・・・・・シリコン基板、2・・・・・・LOCO
3酸化膜、3・・・・・・ゲート酸化膜、4・・・・・
多結晶シリコンゲート層、5・・・・・拡散層、6・・
・・・・窒化シリコン膜、7・・・・・・B P S 
G膜、8・・・・・・アルミニウム配線、9・・・・・
・コンタクト孔。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図 第1図 第2図 第2図
FIGS. 1(-) to 1(e) are process sectional views for explaining an embodiment of the present invention, and FIGS. 2(a) to 2(e) are process sectional views for explaining the prior art. 1...Silicon substrate, 2...LOCO
3 oxide film, 3... Gate oxide film, 4...
Polycrystalline silicon gate layer, 5...diffusion layer, 6...
...Silicon nitride film, 7...B P S
G film, 8... Aluminum wiring, 9...
・Contact hole. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 1 Figure 2 Figure 2

Claims (1)

【特許請求の範囲】[Claims] 半導体装置の所望の領域に窒化シリコン膜を被着する工
程と、前記窒化シリコン膜上にボロンリンケイ酸ガラス
膜を堆積する工程と、前記ボロンリンケイ酸ガラス膜を
水蒸気中で熱処理する工程と、前記ボロンリンケイ酸ガ
ラス膜および前記窒化シリコン膜にコンタクト孔を開孔
する工程と、燐化合物を含むガス雰囲気中で熱処理する
工程とを有することを特徴とする半導体装置の製造方法
depositing a silicon nitride film on a desired region of a semiconductor device; depositing a boron phosphosilicate glass film on the silicon nitride film; heat-treating the boron phosphosilicate glass film in water vapor; A method for manufacturing a semiconductor device, comprising the steps of forming a contact hole in a glass film and the silicon nitride film, and performing heat treatment in a gas atmosphere containing a phosphorous compound.
JP2437086A 1986-02-06 1986-02-06 Manufacture of semiconductor device Pending JPS62183142A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2437086A JPS62183142A (en) 1986-02-06 1986-02-06 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2437086A JPS62183142A (en) 1986-02-06 1986-02-06 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS62183142A true JPS62183142A (en) 1987-08-11

Family

ID=12136303

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2437086A Pending JPS62183142A (en) 1986-02-06 1986-02-06 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS62183142A (en)

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