JPS62214419A - Arithmatic and control unit - Google Patents

Abstract

PURPOSE:To prevent the malfunction by setting an internal circuit to the stand-by mode when a supply voltage falls to a level lower than a preliminarily determined level and releasing this mode when the supply voltage is restored to the preliminarily determined level. CONSTITUTION:An arithmetic and control unit 10 consists of an oscillator 1, an I/O port 2, a display circuit 4, an arithmetic circuit 6, a supply voltage level detecting circuit 7, a control circuit 8, a power-on clear circuit 9, etc., and various peripheral equipments 11-14 are connected to this controller 10. The supply voltage level is detected by the detecting circuit 7; and if this voltage falls from a rated voltage to an operation securing voltage and falls to the detection voltage furthermore, the control circuit 8 sends an interrupt signal to the arithmetic circuit 6 to interrupt the processing, and all required data are saved in a RAM 5, and thereafter, the stand-by mode is set and the oscillator 1 is stopped. When the voltage rises thereafter, the control circuit 8 starts oscillation of the oscillator 1 or the like to restart the normal operation.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to an arithmetic and control device, and in particular, it determines the power supply potential and sets the internal circuit to standby mode when the power supply voltage drops to prevent malfunction of the internal circuit. The present invention relates to an arithmetic and control device that prevents runaway and cancels standby mode to perform normal operation when power supply voltage is restored.

[Conventional technology]

Conventional arithmetic control devices include, for example, a ROM that is composed of a semiconductor integrated circuit and stores programs for performing predetermined arithmetic operations, a RAM that temporarily stores necessary data and arithmetic results, and data in the RAM. It is equipped with an arithmetic circuit that performs predetermined arithmetic operations based on a program in ROM, etc., and a control circuit that outputs control signals, etc. to control peripheral devices connected via an input/output interface based on the arithmetic results. be.

In this arithmetic and control device, the above-mentioned arithmetic operations and the like are performed at a timing based on a predetermined clock signal under a power supply voltage within a predetermined range of levels.

[Problem that the invention seeks to solve]

However, in conventional arithmetic and control units, if the power supply voltage drops due to a temporary increase in the load of peripheral devices, etc., or due to battery depletion in the case of battery drive, the internal circuits may malfunction or run out of control. This may cause damage to peripheral equipment. Further, when such malfunction or runaway occurs, there is a problem that normal operation cannot be restored even if the power supply voltage is restored.

[Means for solving problems]

The present invention has been made in view of the above, and is designed to prevent internal circuits from malfunctioning or running out of control even when the power supply voltage drops, and to return to normal operation when the power supply voltage is restored. To provide an arithmetic and control device which sets an internal circuit to standby mode when the voltage drops below a predetermined level and releases the standby mode of the internal circuit when it recovers to the predetermined level.

According to a preferred embodiment of the arithmetic and control device of the present invention, the predetermined level is set between a voltage that guarantees the operation of the internal circuit and a voltage that is the limit of its operation. Moreover, furthermore,
When the power supply voltage drops and the RAM is no longer able to hold data, the power is controlled to be turned off. Thereafter, when the power supply voltage is restored, the power supply may be controlled to be turned on again.

Hereinafter, the arithmetic and control device of the present invention will be explained in detail.

〔Example〕

FIG. 1 shows an embodiment of the invention. Here, 1 is an oscillator, 2 is 10 (input/output) port, 3 is ROM, 4 is a display circuit, 5 is RAM, 6 is an arithmetic circuit that performs internal arithmetic processing, and 7 detects the potential of the power supply voltage. A detection circuit outputs a detection signal when the potential of the power supply voltage becomes lower than a detection voltage vz, which is a predetermined level described later. 8 is a control for generating various control signals based on the detection signal of the detection circuit 7. circuit,
Reference numeral 9 designates a power-on clear circuit, and 10 designates an arithmetic and control unit comprising a semiconductor device circuit including the above-described circuits 1 to 9, which constitutes a microcomputer in this embodiment. 1
1.12.13.14 are various peripheral devices.

The operation of the above configuration will be explained with reference to the power supply voltage waveform shown in FIG. 2 and the flowchart shown in FIG. 3. First, when the power supply voltage is the rated voltage v0 during the period from time t0 to time t, the detection circuit 7 does not generate a detection signal, so the control circuit 8 does not generate a control signal (or does not generate a control signal for normal operation). (is generated), and the arithmetic and control unit 10 performs normal operation. Next, time 1. The power supply voltage begins to drop at time t2.
When the voltage reaches the operation guaranteed voltage v1 at time t, and further decreases to the detection voltage v2 at time t, the detection circuit 7 generates a detection signal,
The control circuit 8 generates an interrupt signal to the arithmetic circuit based on this detection signal, interrupts the processing currently being performed by the arithmetic circuit 6, saves all necessary data to the RAM 5, and then enters standby mode. control and also stop the oscillator. Therefore, malfunction and runaway of the internal circuit can be prevented. Incidentally, during the period from time t0 to time t, normal operation is performed even if there is a potential drop. The power supply voltage continues to decrease after time t3, reaches the operating limit voltage v3 at time t4, and further decreases thereafter until time t.

At this point, the lowest power supply voltage V is reached, and this voltage is maintained until time t6. After that, it rises at time t6, and at time 1. Assuming that the detection voltage v2 is reached again in , the arithmetic processing unit 10 maintains the standby mode during this period of time t, to t, and only holds internal data. At this time, unless the lowest power supply voltage v4 becomes lower than the data holding voltage V of the RAM 5, the held data will not be destroyed.

At time t7, the detection signal from the detection circuit 7 stops being generated, so the control circuit 8 starts the oscillation of the oscillator 1, returns the necessary data saved in the RAM 5 to the arithmetic circuit 6, and continues the interrupted process. normal operation resumes. By performing such a series of controls, the arithmetic and control device 10 operates without being affected by the power supply voltage drop before and after the power supply voltage drop. In general, the operation guaranteed voltage (1) is set to a certain degree higher than (3) with a margin than the operating limit voltage of the device, so it is easy to set the detection voltage (2) between them, and the data retention of RAM5 is very low compared to the operating limit voltage V in the case of the CMO3 configuration, and data retention is possible even when the power supply voltage fluctuates over a wide range. Further, when the power supply voltage becomes lower than the data holding voltage v5, the detection circuit 7 is made to generate another detection signal, and when this other detection signal is output, the power-on clear circuit 9
By generating a power-on clear signal to turn off the power, it is possible to prevent internal circuits from malfunctioning or running out of control. Thereafter, when the power supply voltage is restored, the same operation as when the power is turned on again can be performed.

〔Effect of the invention〕

As explained above, according to the arithmetic and control device of the present invention,
When the power supply voltage drops below a predetermined level, the internal circuit is set to standby mode, and when it recovers to the predetermined level, the internal circuit is released from standby mode, so even if the power supply voltage drops, the internal circuit remains It is possible to prevent the system from malfunctioning or going out of control, and it is also possible to return to normal operation when the power supply voltage is restored.

[Brief explanation of drawings]

FIG. 1 is a system block diagram showing an embodiment of the present invention;
FIG. 2 is a power supply voltage waveform diagram, and FIG. 3 is a control flowchart. Explanation of symbols

Claims (1)

[Claims] a potential detection circuit that detects the potential of the power supply voltage; and when the potential detection circuit detects that the potential of the power supply voltage has fallen below a predetermined level, the internal circuit is set to standby mode, and the voltage is set to the predetermined level. 1. An arithmetic control device comprising: a control circuit for canceling the standby mode when detecting recovery from the standby mode.