KR20000025277A - Power control circuit of portable electronic apparatus - Google Patents

Abstract

PURPOSE: A power control circuit is provided to prevent a breakdown of worked data and a system hang-up owing to an interruption of a system power in the case that a charging state of a main battery is low or that the main battery is removed. CONSTITUTION: A power control circuit comprises a system unit(122) which has a central processing unit(124) for controlling a normal operation mode and a power saving mode of the system unit(122). A first delay circuit(106) is connected to a main battery(102), and serves as a filter circuit for making a voltage drop appearance owing to an inrush current of the main battery(102) not sensed as a low battery state. A voltage detecting circuit(108) senses a battery charging state from an output voltage of the main battery(102) to output a detection signal(LOW_batt) as a sense result. A control circuit(120) maintains a state of an output signal(INTERRUP) while a power supply voltage supplied from the main battery(102) is maintained at an appropriate voltage level. A capacitor(118) supplies a power of a normal operation mode of the system unit until the central processing unit(124) enters the power saving mode, in the state that the main battery(102) and an auxiliary battery(104) are at a low battery state. A second delay circuit(114) makes an auxiliary DC/DC regulator(116) not turned on until the central processing unit enters the power saving mode, in a case where the main battery is removed from a portable electronic apparatus.

Description

POWER CONTROL CIRCUIT OF PORTABLE ELECTRONIC APPARATUS INCLUDING MAIN BATTERY AND BACK-UP BATTERY

The present invention relates to a power supply control circuit of a portable electronic device, and more particularly, to a power supply control circuit for controlling a power supply in a power saving mode of a portable electronic device using a main and auxiliary battery.

1 and 2, a personal digital assistant (PDA) 10 is illustrated as one of portable electronic devices. The PDA 10 uses a main battery 14 to supply power to the system. And an auxiliary battery 16 for backup through the logic inverter 22, and temporarily supplies system power through the auxiliary battery 16 when the state of charge of the main battery 16 is at a low level. .

And a CPU detecting a battery state from an output voltage of the main battery 14 and a CPU for controlling a normal operation mode or a power saving mode of the PDA 10 by receiving a detection signal from the voltage detection circuit 18. (28). That is, the CPU 28 controls the normal operation mode or the power saving mode of the system unit 26 having components such as a memory, a display device, and an input device.

When the voltage detection circuit 18 detects a power supply voltage of the main battery 14 and is in a low battery state, an interrupt for the portable electronic device 10 to operate in a power saving mode to the CPU 28 through the detection signal LOW_batt. Occurs. The main DC / DC regulator 20 is turned on / off using the detected information. Therefore, when the low battery state is generated, the low battery state is detected from the battery voltage detection circuit 18 to activate and output the detection signal LOW_batt. Subsequently, the CPU 28 controls to operate in the power saving mode of the portable electronic device 10 in response to the detection signal LOW_batt. At this time, when a resume operation is performed, the CPU 28 performs a resume operation regardless of the state of charge / discharge of the main battery 14, and thus the system power becomes unstable because there is no charge capacity of the main battery 10. As a result, power of the portable electronic device 10 may be cut off, and data in operation may be lost.

In addition, when the auxiliary battery 16 is not used, a large capacity of a capacitor (not shown) is provided to temporarily turn the power on so that the portable electronic device 10 operates in a power saving mode while the main battery 14 is replaced. Supply. In this case, it is designed to replace the main battery within a short time, which is difficult to use.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-described problem, and when the main battery is removed or the main battery is low, the system power is cut off to prevent the loss of data in operation and the system stops ( The present invention provides a power supply control circuit of a portable electronic device that prevents hang-up.

In addition, the present invention provides a portable electronic device that operates a system power saving mode using a low-level power supply voltage of a main battery to improve battery use efficiency.

1 is a perspective view of a PDA, which is a portable electronic device using a battery;

2 is a block diagram showing the configuration of a portable electronic device according to an embodiment of the prior art; And

3 is a block diagram illustrating a configuration of a portable electronic device according to an embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

100: PDA 102: main battery

104: auxiliary battery 106: first delay circuit

108: voltage detection circuit 110: main DC / DC regulator

112: logic inverter 114: second delay circuit

116: auxiliary DC / DC regulator 118: capacitor

120: control circuit 122: system unit

124: CPU

According to an aspect of the present invention for achieving the above object, a system unit which is operated in a normal operation mode or a power saving mode under the control of the CPU and the CPU and a main and auxiliary battery for supplying power to the system unit A portable electronic device, comprising: a detection circuit for detecting a state of the main battery through an output voltage of the main battery; A control circuit which receives a detection signal of the detection circuit and outputs a control signal corresponding to a normal operation mode or a power saving mode to the system unit; A main regulator for supplying power required for a normal mode or a power saving mode of the system unit through a power input from the main battery; An auxiliary regulator for supplying power for a power saving mode of the system unit through power input from the auxiliary battery of the system unit; The control circuit comprises, when the system unit is operated in a power saving mode, shutting off the main regulator and controlling to supply power from the auxiliary regulator to operate the power saving mode of the system unit.

In a preferred embodiment of the present invention, when the system unit is operated in a power saving mode, when the main battery is removed or in a low battery state, a power supply voltage charged from the main battery is supplied to the system unit. It further includes a capacitor to prevent the reset function.

In a preferred embodiment of this aspect, the control circuit is provided with a thyristor which latches the output signal after one trigger.

In a preferred embodiment of this aspect, the control circuit comprises latching the output signal while the power supply voltage supplied from the main battery to the system unit maintains a proper voltage level.

In a preferred embodiment of this aspect, the control circuit is provided with a microcomputer.

In a preferred embodiment of this aspect, the first delay circuit for filtering the voltage detection circuit so that the voltage drop due to the inrush current of the main battery is not detected as a low battery state; There is an appropriate delay time so that the auxiliary DC / DC regulator is not turned on until the system unit is operated in a power saving mode, and the power supply voltage supplied to the system unit is in the normal operation mode or the power saving mode of the system unit. And a second delay circuit adapted to turn on the auxiliary DC / DC regulator before it falls below the supply voltage at.

In a preferred embodiment of this aspect, the first delay circuit has a delay time for adjusting the output voltage of the main DC / DC regulator to normally supply the system unit when the main battery is momentarily dropped in voltage. It includes.

Therefore, according to the present invention, the output voltage of the main battery is received to output the low level detection signal to the control circuit before the main battery is removed or until the low battery state is detected. In this state, when the system unit is operated in the power saving mode, the main DC / DC regulator is turned off, and the system unit is supplied in the power saving mode by receiving an appropriate power supply voltage from the capacitor.

In addition, when the system unit is operating in the normal operation mode, when the main DC / DC regulator is turned off when the output voltage of the main battery is a low-level power supply voltage, and the system unit is operated in the power saving mode, the main battery is in the power saving mode Power on the system unit. The control circuit latches the control signal according to the state of the low battery detected from the main battery.

If the above operation continues and the main battery becomes a battery state in which the power saving mode of the system unit cannot be operated in the low level state, the power supply of the power saving mode is supplied from the auxiliary battery to the system unit.

DETAILED DESCRIPTION Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3 illustrates a configuration of a portable electronic device 100 according to an embodiment of the present invention.

Referring to the drawing, the portable electronic device 100 includes a main battery 102 and an auxiliary battery 104 to supply system power. And a logic inverter 112 and first and second delay circuits 106 and 114. And a voltage detection circuit 108, a control circuit 120, and main and auxiliary DC / DC regulators 110, 116. And a capacitor 118 and a system unit 122.

The system unit 122 is provided to match the characteristics of the portable electronic device 100 such as the CPU 124 and a memory, a display device, and an input / output device, for example. The CPU 124 controls the overall operation of the system. In particular, the normal operation mode or the power saving mode of the system unit 124 is controlled.

The first delay circuit 106 is provided with, for example, a resistor (R) -capacitor (C) delay circuit, such that the voltage detection circuit 108 causes a voltage drop due to an inrush current of the main battery 102. It is a filtering circuit that does not detect a drop phenomenon as a low battery state. Therefore, the delay time of the delay circuit 106 is provided to be set to the maximum time that the output voltage of the main DC / DC regulator 110 is normal when the main battery 102 is instantaneously voltage drop. This should be designed so that the system operates stably even when the charging capacity of the main battery 102 is small and the load of the system unit 122 is driven to the maximum.

The voltage detection circuit 108 detects a battery charge state from the output voltage of the main battery 102 and outputs a detection signal LOW_batt corresponding thereto. That is, if the output voltage of the main battery 102 is a low voltage battery voltage, the voltage detection circuit 108 outputs an active detection signal LOW_batt. At this time, the low battery state is calculated from an appropriate low battery voltage by shaping the discharge curve of the main battery 102 under the driving conditions of the system. Accordingly, the detection signal LOW_batt is provided to the CPU 124 to control the CPU 124 to operate in a power saving mode of the system.

The control circuit 120 includes, for example, a reverse blocking triode thyrister for power control, and latches an output signal INTERRUPT for an interrupt after one trigger. Has Or equipped with a microcomputer to control with the same function. Therefore, the state of the output signal INTERRUPT is continuously maintained while the power supply voltage supplied from the main battery 102 maintains an appropriate voltage level.

The capacitor 118 supplies power in the normal operation mode of the system unit 122 until the main battery 102 and the auxiliary battery 104 are in a low battery state until the CPU 124 enters a power saving mode. It is provided with the appropriate capacity to.

The second delay circuit 114 is, for example, provided as a resistor (R) -capacitor (C) delay circuit. When the main battery 102 is removed from the portable electronic device 100, the auxiliary DC / DC regulator 116 is not turned on until the CPU 124 is operated in a power saving mode. To ensure proper delay time. The auxiliary DC / DC regulator 116 is turned on before the power supply voltage supplied to the system unit 122 becomes lower than the power supply voltage in the normal operation mode or the power saving mode of the system unit 122. It is provided to be.

In more detail, the voltage detection circuit 108 receives the output voltage of the main battery 102 and before or after the main battery 102 is removed, the detection signal LOW_batt biased to a low level. The low level detection signal LOW_batt is output until the battery state is detected. That is, the deactivated detection signal LOW_batt is output to the control circuit 120. In this state, when the system unit 122 is operated in a power saving mode, even if the main DC / DC regulator 110 is turned off, the system unit 122 is properly powered from the capacitor 118. It operates in power saving mode by receiving voltage. This supplies the power to the system unit 122 sufficient for the capacitor 118 to drive the power saving mode so that the system unit 122 operates in the power saving mode.

In addition, when the system unit 122 operates in the normal operation mode, when the output voltage of the main battery 102 is a low level power supply voltage, the main DC / DC regulator 110 is turned off and the CPU 124 is turned off. When the system unit 122 is controlled in the power saving mode, the system unit 122 is operated in the power saving mode. At this time, the main battery 102 is in a state sufficient to supply power to the system unit 122 during the power saving mode, that is, the load of the system due to the power saving mode is reduced, so that the system in the low level state of the main battery 102 is reduced. The main DC / DC regulator 110 is turned on again to supply power, but the control circuit 120 continues to control the signal INTERRUPT by the state of the low battery detected from the main battery 102. The latch does not cause the system unit to be resumed.

Therefore, since the main battery 102 is supplied with power during the power saving mode, the use time of the auxiliary battery 104 can be extended.

If the above-described operation continues and the main battery 102 becomes a charged state in which the power saving mode of the system unit 122 cannot be operated in the low level state, the power saving mode from the auxiliary battery 104 to the system unit 122 is maintained. To supply power. Therefore, the system unit 122 is maintained in the power saving mode through the auxiliary battery 104.

Therefore, when the main battery 102 cannot be replaced in a short time, the auxiliary battery 104 is not discharged by supplying the power of the system unit 122 in the power saving mode using the main battery 102 in the low battery state. Will not. In addition, by using the main battery 102 in a low battery state to the maximum, the use efficiency of the main battery 102 is improved.

As described above, the present invention preserves data in operation through the auxiliary battery when the main battery is replaced when the main battery is discharged, and prevents the system from being stopped by preventing oscillation of the low battery detection signal.

When the main battery cannot be replaced in a short time, the charging voltage of the capacitor is used without discharging the auxiliary battery, thereby increasing the use efficiency of the main battery.

Claims (6)

A portable electronic device having a system unit operated under a control of the CPU and the CPU and operating in a normal operation or power saving mode, and a main and auxiliary battery for supplying power to the system unit: A detection circuit for detecting a state of the main battery through an output voltage of the main battery; A control circuit which receives a detection signal of the detection circuit and outputs a control signal corresponding to a normal operation mode or a power saving mode to the system unit; A main regulator for supplying power required for a normal mode or a power saving mode of the system unit through a power input from the main battery; An auxiliary regulator for supplying power for a power saving mode of the system unit through power input from the auxiliary battery of the system unit; And the control circuit controls to shut off the main regulator when the system unit is operated in a power saving mode and to supply power from the auxiliary regulator to operate the power saving mode of the system unit. The method of claim 1, When the system unit is operated in a power saving mode, when the main battery is removed or in a low battery state, a capacitor for supplying a power voltage charged from the main battery to the system unit to prevent a reset function of the system unit is further provided. Portable electronic device comprising a. The method of claim 1, And the control circuit is provided with a thyristor for latching an output signal after a trigger. The method according to claim 1 or 3, And the control circuit latches the output signal while the power supply voltage supplied from the main battery to the system unit maintains an appropriate voltage level. The method of claim 1, A first delay circuit for filtering the voltage detection circuit so that the voltage drop due to the inrush current of the main battery is not detected as a low battery state; There is an appropriate delay time such that the auxiliary DC / DC regulator is not turned on until the system unit is operated in a power saving mode, and the power supply voltage supplied to the system unit is normal to the system unit. And a second delay circuit arranged to turn on the auxiliary DC / DC regulator before the voltage falls below the power supply voltage in the operation mode or the power saving mode. The method according to claim 1 or 5, And the first delay circuit has a delay time for adjusting the output voltage of the main DC / DC regulator to normally supply to the system unit when the main battery is momentarily dropped in voltage.