JPS62212857A - バツフアアドレス管理方式 - Google Patents

バツフアアドレス管理方式

Info

Publication number
JPS62212857A
JPS62212857A JP61057313A JP5731386A JPS62212857A JP S62212857 A JPS62212857 A JP S62212857A JP 61057313 A JP61057313 A JP 61057313A JP 5731386 A JP5731386 A JP 5731386A JP S62212857 A JPS62212857 A JP S62212857A
Authority
JP
Japan
Prior art keywords
address
processor
data
storage unit
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61057313A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0431423B2 (enrdf_load_stackoverflow
Inventor
Ryoji Ishiwatari
石渡　良治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP61057313A priority Critical patent/JPS62212857A/ja
Publication of JPS62212857A publication Critical patent/JPS62212857A/ja
Publication of JPH0431423B2 publication Critical patent/JPH0431423B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Computer And Data Communications (AREA)
  • Memory System (AREA)
  • Multi Processors (AREA)
JP61057313A 1986-03-14 1986-03-14 バツフアアドレス管理方式 Granted JPS62212857A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61057313A JPS62212857A (ja) 1986-03-14 1986-03-14 バツフアアドレス管理方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61057313A JPS62212857A (ja) 1986-03-14 1986-03-14 バツフアアドレス管理方式

Publications (2)

Publication Number Publication Date
JPS62212857A true JPS62212857A (ja) 1987-09-18
JPH0431423B2 JPH0431423B2 (enrdf_load_stackoverflow) 1992-05-26

Family

ID=13052075

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61057313A Granted JPS62212857A (ja) 1986-03-14 1986-03-14 バツフアアドレス管理方式

Country Status (1)

Country Link
JP (1) JPS62212857A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPH0431423B2 (enrdf_load_stackoverflow) 1992-05-26

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Legal Events

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