JPS62204328U - - Google Patents
Info
- Publication number
- JPS62204328U JPS62204328U JP1986092391U JP9239186U JPS62204328U JP S62204328 U JPS62204328 U JP S62204328U JP 1986092391 U JP1986092391 U JP 1986092391U JP 9239186 U JP9239186 U JP 9239186U JP S62204328 U JPS62204328 U JP S62204328U
- Authority
- JP
- Japan
- Prior art keywords
- hole
- bonding
- tape carrier
- semiconductor chip
- bored
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 3
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims 1
- 239000000463 material Substances 0.000 claims 1
- 238000003909 pattern recognition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
Landscapes
- Wire Bonding (AREA)
Description
第１図は本考案の一実施例をテープキヤリアの
裏面から見た状態を示す平面図、第２図は位置決
め用パターンを拡大して示す断面斜視図、第３図
はフエイスダウン・ボンデイングによるインナー
ボンデイングを示す概略断面図である。
６……デバイス孔、８……インナーリード、１
０……半導体チツプ、１２……バンプ、１３……
テープキヤリア、１４……ベース、１８……パタ
ーン認識用孔、２０……位置決め用パターン。
Fig. 1 is a plan view showing an embodiment of the present invention as seen from the back side of the tape carrier, Fig. 2 is a cross-sectional perspective view showing an enlarged positioning pattern, and Fig. 3 is an inner layer formed by face-down bonding. FIG. 3 is a schematic cross-sectional view showing bonding. 6...Device hole, 8...Inner lead, 1
0...Semiconductor chip, 12...Bump, 13...
Tape carrier, 14... Base, 18... Hole for pattern recognition, 20... Pattern for positioning.
Claims (1)
ボンデイングするテープキヤリアにおいて、 半導体チツプをインナーボンデイングするデバ
イス孔の近傍に孔をあけ、その孔内にリード線と
同じ材料にて構成された位置決め用パターンを形
成したことを特徴とするテープキヤリア。[Scope of claim for utility model registration] Semiconductor chips are manufactured face-down using the TAB method.
A tape carrier for bonding, characterized in that a hole is bored in the vicinity of a device hole for inner bonding a semiconductor chip, and a positioning pattern made of the same material as the lead wire is formed in the hole.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986092391U JPS62204328U (en) | 1986-06-16 | 1986-06-16 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986092391U JPS62204328U (en) | 1986-06-16 | 1986-06-16 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62204328U true JPS62204328U (en) | 1987-12-26 |
Family
ID=30954055
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1986092391U Pending JPS62204328U (en) | 1986-06-16 | 1986-06-16 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62204328U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5237768A (en) * | 1975-09-19 | 1977-03-23 | Seiko Instr & Electronics Ltd | Substrate having positioning marks |
-
1986
- 1986-06-16 JP JP1986092391U patent/JPS62204328U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5237768A (en) * | 1975-09-19 | 1977-03-23 | Seiko Instr & Electronics Ltd | Substrate having positioning marks |