JPS62203358A - Lead frame for semiconductor device - Google Patents
Lead frame for semiconductor deviceInfo
- Publication number
- JPS62203358A JPS62203358A JP61045905A JP4590586A JPS62203358A JP S62203358 A JPS62203358 A JP S62203358A JP 61045905 A JP61045905 A JP 61045905A JP 4590586 A JP4590586 A JP 4590586A JP S62203358 A JPS62203358 A JP S62203358A
- Authority
- JP
- Japan
- Prior art keywords
- chip
- inner leads
- lead
- products
- lead frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 7
- 239000007767 bonding agent Substances 0.000 claims abstract description 11
- 239000010931 gold Substances 0.000 abstract description 5
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 abstract description 4
- 229910052737 gold Inorganic materials 0.000 abstract description 4
- 238000007789 sealing Methods 0.000 abstract description 3
- 229920005989 resin Polymers 0.000 abstract description 2
- 239000011347 resin Substances 0.000 abstract description 2
- 238000000034 method Methods 0.000 abstract 3
- 229910052751 metal Inorganic materials 0.000 description 10
- 239000002184 metal Substances 0.000 description 10
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 239000003822 epoxy resin Substances 0.000 description 3
- 229920000647 polyepoxide Polymers 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000565 sealant Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49548—Cross section geometry
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分針〕
この発明はリードフレーム、特に電子部品、ＩＣチップ
等に用いられるリードフレームに関するものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Minute Hand] The present invention relates to lead frames, particularly lead frames used for electronic components, IC chips, etc.
第５図は従来のリードフレームを示すもので、１はリー
ドフレーム中のダイパッドリードであり、金属薄板によ
り打抜加工されたものである。なお通常の金属薄板は０
２５■の厚みのものが多く使用されている。２はＩＣチ
ップ、３はインナリード、４は接合剤、５は接続用金属
線である。FIG. 5 shows a conventional lead frame. Reference numeral 1 indicates a die pad lead in the lead frame, which is stamped from a thin metal plate. Note that normal thin metal plates are 0
A thickness of 25cm is often used. 2 is an IC chip, 3 is an inner lead, 4 is a bonding agent, and 5 is a metal wire for connection.
第５図に示すように、リードフレーム中のダイパッドリ
ード１にＩＣチップを接合するために、先ずグイパット
リード１上に接合剤４を乗せろ。As shown in FIG. 5, in order to bond the IC chip to the die pad leads 1 in the lead frame, first place a bonding agent 4 on the die pad leads 1.
一般に使用される接合剤４は、エポキシ樹脂、銀ペース
ｌ−、Ｐｂ−５ｎ系半田等がある。そしてＩＣチップ２
をダイパッドリード１上に乗せ、押え付けて固定する。Commonly used bonding agents 4 include epoxy resin, silver paste l-, Pb-5n solder, and the like. And IC chip 2
Place it on die pad lead 1 and press it down to fix it.
次に、ＩＣチップ２の表面に形成された電極部と平らな
インナリード３の先端部とを接続用金属細線５、例えば
金（人Ｕ）、アルミニウム（Ａｌｌ線等を用いて接続し
、電気的接続を行う。Next, the electrode portion formed on the surface of the IC chip 2 and the tip portion of the flat inner lead 3 are connected using a thin metal wire 5 for connection, such as gold (U), aluminum (All wire), etc. Make a connection.
その後、ＩＣチップ２およびインナリード３を外的に保
護するために、エポキシ樹脂等により封止がなされる。Thereafter, in order to protect the IC chip 2 and inner leads 3 externally, they are sealed with epoxy resin or the like.
上記のような従来装置では、ＩＣチップ２表面の電場部
とインナリード３の先端部を接続用金属細線５を用いて
一本一本接続していたため、次のような欠点があった。In the conventional device as described above, the electric field portion on the surface of the IC chip 2 and the tip portion of the inner lead 3 were connected one by one using the thin metal wires 5 for connection, and therefore had the following drawbacks.
■）多数本（例えば６０本）の接続作業にはかなりの時
間を要する。(2) It takes a considerable amount of time to connect a large number of cables (for example, 60 cables).
１１）接続用金属細線が接続用の駆動系の組立調整次第
でＩＣチップ表面に接触する。11) The thin metal wire for connection comes into contact with the surface of the IC chip depending on the assembly and adjustment of the drive system for connection.
１ｉｉ）ＮＪ続続合金属細線金（人Ｕ）、アルミニウム
（ＡＩ）を用いているためコスト高となる。1ii) The cost is high because NJ interconnected metal fine wire gold (U) and aluminum (AI) are used.
ｉｖ）接続後の封止のとき、接続用金属細線が封止剤等
により押し流され、チップに接触することにより、歩留
りを低下させる。iv) During sealing after connection, the thin metal wire for connection is swept away by the sealant and comes into contact with the chip, reducing yield.
この発明は上記のような問題点を解消することを目的と
してなされたものである。This invention was made with the aim of solving the above-mentioned problems.
この発明に係るリードフレームは、インナリードの先端
部がほぼＺ状に折り曲げられ、このＺ状部の先端が半導
体素子表面に形成された電極に接合剤により接合されて
いるものである。In the lead frame according to the present invention, the tip of the inner lead is bent into a substantially Z-shape, and the tip of the Z-shaped portion is bonded to an electrode formed on the surface of a semiconductor element using a bonding agent.
この発明によるリードフレームは、インナリードにより
直接半導体素子に接続を行うものであるから、従来の接
続用金属細線が不要となり、作業が簡単になるだけでな
く、安価で品質の高いリードフレームを得ることができ
る。Since the lead frame according to the present invention connects directly to the semiconductor element through the inner lead, the conventional thin metal wire for connection is not required, which not only simplifies the work but also provides a lead frame with high quality at low cost. be able to.
以下この発明の一実施例を図について説明する。 An embodiment of the present invention will be described below with reference to the drawings.
第１図において、１はリードフレーム中のダイパラ１、
リード、６はインナリード、７は上記インナリード６の
先端部に設けられた接合剤で、第２図に示すようにダイ
パッドリード１上にＩＣチップ２を載置後、第３図、第
４図に示すように、インナリード６をその先端部が上方
に突出しないようにＩＣチップ２に沿って折曲げ、さら
にこの折曲げた先端部に設けられた接合剤７をインナリ
ード電極接合機８により融合させ、インナリード６とＩ
Ｃチップ２とを接合し、電気的接続を得る。その後、Ｉ
Ｃチップ２及びインナリード６を外的に保護するために
、エポキシ樹脂等により封止がなされる。なお上記イン
ナリード６の幅及び先端折曲部の長さは、これが接続さ
れろＩＣチップ２上の電極からはみ出さないサイズにな
されている。In Fig. 1, 1 is a die plater 1 in the lead frame;
A lead, 6 is an inner lead, and 7 is a bonding agent provided at the tip of the inner lead 6. After placing the IC chip 2 on the die pad lead 1 as shown in FIG. As shown in the figure, the inner lead 6 is bent along the IC chip 2 so that its tip does not protrude upward, and the bonding agent 7 provided on the bent tip is applied to the inner lead electrode bonding machine 8. The inner lead 6 and I
C chip 2 is bonded to obtain electrical connection. Then I
In order to protect the C chip 2 and the inner leads 6 externally, they are sealed with epoxy resin or the like. Note that the width of the inner lead 6 and the length of the bent portion at the tip are such that the inner lead 6 does not protrude from the electrode on the IC chip 2 to which it is connected.
以上のようにこの発明によれば、インナリードの先端を
Ｍ接ＩＣチップ表面に形成された電極部に接合すること
ができるようにインナリードを構成したので、従来のよ
うに接続用金属細線を用いて一本一本接続する必要がな
いため、短時間で接続作業が可能となり、また、金（人
Ｕ）のような高価な細線を用いないでよいため、製品の
コストダウンが図れる。さらに、接続用金属細線を用い
た場合はそれがＩＣチップ表面に接触したり、また次工
程の樹脂等による封止時、それが押し流される等の不具
合があったが、この発明ではこのような不具合を解消し
、製品の歩留りを向上させることを可能とするものであ
る。As described above, according to the present invention, the inner lead is configured so that the tip of the inner lead can be joined to the electrode portion formed on the surface of the M-contact IC chip. Since there is no need to use wires to connect each wire one by one, the connection work can be completed in a short time, and there is no need to use expensive thin wires such as gold wires, so the cost of the product can be reduced. Furthermore, when using thin metal wires for connection, there were problems such as the wires coming into contact with the surface of the IC chip, or being washed away during the next step of sealing with resin, etc., but this invention solves these problems. This makes it possible to eliminate defects and improve product yield.
第１図〜第４図はこの発明の一実施例をその組立順序に
従って示す斜視図、第５図は従来の半導体装置用リード
フレームを示す斜視図である。
図中、１はダイパッドリード、２はＩＣチップ、４は接
合剤、６（よインナリード、７は接合剤である。
尚、図中同一符号は同−又は相当部分を示す。1 to 4 are perspective views showing an embodiment of the present invention according to the assembly order, and FIG. 5 is a perspective view showing a conventional lead frame for a semiconductor device. In the figure, 1 is a die pad lead, 2 is an IC chip, 4 is a bonding agent, 6 is an inner lead, and 7 is a bonding agent. Note that the same reference numerals in the figure indicate the same or corresponding parts.
Claims (1)
部の先端が半導体素子表面に形成された電極に接合剤に
より接合されていることを特徴とする半導体装置用リー
ドフレーム。1. A lead frame for a semiconductor device, characterized in that the tip of the inner lead is bent into a substantially Z-shape, and the tip of the Z-shaped portion is bonded to an electrode formed on the surface of a semiconductor element using a bonding agent.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61045905A JPS62203358A (en) | 1986-03-03 | 1986-03-03 | Lead frame for semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61045905A JPS62203358A (en) | 1986-03-03 | 1986-03-03 | Lead frame for semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62203358A true JPS62203358A (en) | 1987-09-08 |
Family
ID=12732260
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61045905A Pending JPS62203358A (en) | 1986-03-03 | 1986-03-03 | Lead frame for semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62203358A (en) |
-
1986
- 1986-03-03 JP JP61045905A patent/JPS62203358A/en active Pending
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