JPS6218935B2 - - Google Patents
Info
- Publication number
- JPS6218935B2 JPS6218935B2 JP16858979A JP16858979A JPS6218935B2 JP S6218935 B2 JPS6218935 B2 JP S6218935B2 JP 16858979 A JP16858979 A JP 16858979A JP 16858979 A JP16858979 A JP 16858979A JP S6218935 B2 JPS6218935 B2 JP S6218935B2
- Authority
- JP
- Japan
- Prior art keywords
- register
- external
- circuit
- data
- registers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16858979A JPS5690345A (en) | 1979-12-25 | 1979-12-25 | External register write system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16858979A JPS5690345A (en) | 1979-12-25 | 1979-12-25 | External register write system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5690345A JPS5690345A (en) | 1981-07-22 |
| JPS6218935B2 true JPS6218935B2 (cs) | 1987-04-25 |
Family
ID=15870849
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16858979A Granted JPS5690345A (en) | 1979-12-25 | 1979-12-25 | External register write system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5690345A (cs) |
-
1979
- 1979-12-25 JP JP16858979A patent/JPS5690345A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5690345A (en) | 1981-07-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH0612863A (ja) | デュアルポートdram | |
| JPH0411957B2 (cs) | ||
| US4949242A (en) | Microcomputer capable of accessing continuous addresses for a short time | |
| JPS6128198B2 (cs) | ||
| US4888685A (en) | Data conflict prevention for processor with input/output device | |
| JPS6218935B2 (cs) | ||
| KR910001708B1 (ko) | 중앙처리장치 | |
| JPS63116262A (ja) | デ−タ処理装置 | |
| JPS6022774B2 (ja) | 入出力端子制御方式 | |
| JPS6329298B2 (cs) | ||
| JPS63115251A (ja) | デイスクキヤツシユ制御装置 | |
| JPH0120514B2 (cs) | ||
| JPS6232818B2 (cs) | ||
| JPS60218146A (ja) | 記憶装置アドレス制御方式 | |
| JPS6148735B2 (cs) | ||
| JPH02136921A (ja) | レジスタアクセス方式 | |
| EP0714060A1 (en) | One chip microcomputer with built-in non-volatile memory | |
| JPS62196745A (ja) | レジスタ書込み方式 | |
| JPS61269288A (ja) | 記憶素子モジユ−ル | |
| JPS6113319B2 (cs) | ||
| JPH01263819A (ja) | 集積回路 | |
| JPS6250854B2 (cs) | ||
| JPS6320631A (ja) | レジスタ選択方式 | |
| JPS6364141A (ja) | 記憶装置 | |
| JPS60112140A (ja) | スタックのアクセス方式 |