JPS62179603U

JPS62179603U -

Info

Publication number: JPS62179603U
Application number: JP6595586U
Authority: JP
Priority date: 1986-04-30
Filing date: 1986-04-30
Publication date: 1987-11-14

Description

[Brief explanation of the drawing]

第１図は従来の記憶部のプログラム領域を説明
するための図、第２図〜第９図は本考案の１実施
例を示すもので第２図は操作パネルの操作キーを
示す図、第３図は基本構成のブロツク回路図、第
４図はＯＮ、ＯＦＦ及びＯＮ、ＯＦＦどちらでも
よい入出力条件設定入力のフローチヤート図、第
５表は入出力条件ＯＮ、ＯＦＦ、＊のビツトパタ
ーンを示す表、第６図はシーケンスプログラムの
実行処理のフローチヤート図、第７図はフラグメ
モリのフラグ設定を示す図、第８図は走査型プロ
グラムの実行処理を示すフローチヤート図、第９
図は記憶部のプログラム領域を説明するための図
である。２１は中央処理装置、２２は読み出し専用メモ
リ、２３は読み出し可能メモリ、３０はシステム
コントロール入力、３１は入力信号、３２は出力
信号である。 Fig. 1 is a diagram for explaining the program area of a conventional storage section, Figs. 2 to 9 show an embodiment of the present invention, and Fig. 2 is a diagram showing operation keys on an operation panel. Figure 3 is a block circuit diagram of the basic configuration, Figure 4 is a flowchart of ON, OFF, input/output condition setting input that can be either ON or OFF, and Table 5 shows the bit pattern of input/output conditions ON, OFF, *. 6 is a flowchart of sequence program execution processing, FIG. 7 is a flowchart of flag setting in the flag memory, FIG. 8 is a flowchart of scanning program execution processing, and FIG. 9 is a flowchart of sequence program execution processing.
The figure is a diagram for explaining a program area of a storage section. 21 is a central processing unit, 22 is a read-only memory, 23 is a readable memory, 30 is a system control input, 31 is an input signal, and 32 is an output signal.

補正昭６１．８．７図面の簡単な説明を次のように補正する。明細書１５頁上から４行目〜５行目の「第５表
」を「第５図」に訂正します。明細書１５頁上から６行目の「表」を「図」に
訂正します。Amendment August 7, 1981 The brief description of the drawing is amended as follows. "Table 5" on the 4th to 5th lines from the top of page 15 of the specification will be corrected to "Figure 5." The word "table" in the sixth line from the top of page 15 of the specification will be corrected to "figure."

Claims

[Scope of utility model registration request]

In a sequence controller that can set process step-type programs and scanning-type programs, a memory section is provided in which input/output conditions are written by operating various setting keys, and a data set memory area and a data and set memory area are provided in the memory section. During execution, there is a means for determining the logical product of the external input signal data and the data in the input data and set memory, a means for determining the match between the output data of the logical product determining means and the input data set memory, and a means for determining the coincidence between the data of the external output signal and the data of the output AND set memory. It consists of means for determining the logical product of the data in the data set memory, and means for determining the logical sum of the output data of the logical product determining means and the data of the output data set memory. A program control device for a sequence controller, comprising: and a storage unit in which a scanning type program can be selected and written.