JPH0478644U - - Google Patents

Description

[Brief explanation of drawings]

Fig. 1 is a block diagram showing an electronic computer according to an embodiment of this invention, Fig. 2 is a flowchart showing details of operation according to an embodiment of this invention, and Figs. 3 and 4 are diagrams showing a conventional electronic computer. FIG. 2 is a configuration diagram showing two typical types. In Figure 1, 1 is the CPU, 2 is the program area, 3 is the data area, 4 is the bus, 5 is the installed program, 6 is the work area, 7 is the address table, 8 is the command program, 9 is the initialization program, and 10 is the Spare area, 12 is instruction code, 14 is address data of address table, 1
5 is reprogramming. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Scope of utility model registration request] In an electronic computer that consists of a central processing unit that controls processing, a data read-only memory, and a data read/write memory, the data read-only memory and the data read/write memory are paired. There is memory that constitutes one address, and memory that constitutes one address only with data readable and writable memory, and the data read-only memory and data readable and writable memory form a pair. The memory has a memory area that can store a group of subroutine programs including a command program and an initialization program, and the address data and subroutines are stored in a memory where only the memory that can read and write the above data constitutes one address. An electronic computer equipped with a memory area that can store programs and temporary data.