JPS62138256U - - Google Patents

Info

Publication number
JPS62138256U
JPS62138256U JP2672386U JP2672386U JPS62138256U JP S62138256 U JPS62138256 U JP S62138256U JP 2672386 U JP2672386 U JP 2672386U JP 2672386 U JP2672386 U JP 2672386U JP S62138256 U JPS62138256 U JP S62138256U
Authority
JP
Japan
Prior art keywords
stack
memory
holding
computer
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2672386U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP2672386U priority Critical patent/JPS62138256U/ja
Publication of JPS62138256U publication Critical patent/JPS62138256U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の一実施例を示す電子計算機
のプツシユ命令機構図、第2図は従来の電子計算
機プツシユ命令機構図、第3図は従来のプツシユ
命令を使用する場合のプログムラコード例を示す
図であり、21はスタツクアドレスを保持するメ
モリ、22はスタツク最終アドレスを保持するメ
モリ、23は比較回路、24は割り込み発生信号
ラインである。なお、図中同一符号は同一又は相
当部分を示す。
Figure 1 is a diagram of the push command mechanism of an electronic computer showing an embodiment of this invention, Figure 2 is a diagram of the push command mechanism of a conventional electronic computer, and Figure 3 is an example of program code when using the conventional push command. 21 is a memory that holds a stack address, 22 is a memory that holds a stack final address, 23 is a comparison circuit, and 24 is an interrupt generation signal line. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 電子計算機の機械命令に属すプツシユダウンス
タツク命令に関するスタツクアドレスを保持する
メモリと、スタツク最終アドレスを保持するメモ
リと、スタツク異常割り込みを発生させる機構と
を備えた電子計算機。
An electronic computer comprising a memory for holding a stack address related to a pushdown stack instruction belonging to a machine instruction of the computer, a memory for holding a stack final address, and a mechanism for generating a stack abnormality interrupt.
JP2672386U 1986-02-26 1986-02-26 Pending JPS62138256U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2672386U JPS62138256U (en) 1986-02-26 1986-02-26

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2672386U JPS62138256U (en) 1986-02-26 1986-02-26

Publications (1)

Publication Number Publication Date
JPS62138256U true JPS62138256U (en) 1987-08-31

Family

ID=30828069

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2672386U Pending JPS62138256U (en) 1986-02-26 1986-02-26

Country Status (1)

Country Link
JP (1) JPS62138256U (en)

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