JPS6443470U - - Google Patents

Info

Publication number
JPS6443470U
JPS6443470U JP13919487U JP13919487U JPS6443470U JP S6443470 U JPS6443470 U JP S6443470U JP 13919487 U JP13919487 U JP 13919487U JP 13919487 U JP13919487 U JP 13919487U JP S6443470 U JPS6443470 U JP S6443470U
Authority
JP
Japan
Prior art keywords
processor
memory
address
image processing
image data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13919487U
Other languages
Japanese (ja)
Other versions
JPH082756Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987139194U priority Critical patent/JPH082756Y2/en
Publication of JPS6443470U publication Critical patent/JPS6443470U/ja
Application granted granted Critical
Publication of JPH082756Y2 publication Critical patent/JPH082756Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Image Input (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図はこの考案に係る画像処理装置の一実施
例を示すブロツク回路図、第２図は同実施例の補
助アドレス発生器の具体的な構成を示すブロツク
回路図、第３図は同実施例の補助アドレス発生器
によつてメモリ拡張に対するアドレスラインのビ
ツト数を増加した様子を示すブロツク回路図、第
４図は従来の画像処理装置の構成を示すブロツク
回路図である。 １１……システムコントロール装置、１２……
プロセツサ、１３……メモリ、１４……インター
フエース、１５……補助アドレス発生器、１５１
……アドレス制御回路、１５２……アドレス発生
回路。 FIG. 1 is a block circuit diagram showing an embodiment of an image processing device according to this invention, FIG. 2 is a block circuit diagram showing a specific configuration of an auxiliary address generator of the same embodiment, and FIG. FIG. 4 is a block circuit diagram showing how the number of bits of the address line for memory expansion is increased by the auxiliary address generator of the example. FIG. 4 is a block circuit diagram showing the configuration of a conventional image processing device. 11...System control device, 12...
Processor, 13...Memory, 14...Interface, 15...Auxiliary address generator, 151
... Address control circuit, 152 ... Address generation circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] プロセツサで発生されるアドレスによつてメモ
リから画像データを読出し、読み出した画像デー
タをプロセツサに入力して画像処理を行なう画像
処理装置において、前記メモリの拡張に際して前
記プロセツサの不足アドレスを該プロセツサと同
期して発生し前記メモリに送出する補助アドレス
発生器を具備する画像処理装置。 In an image processing device that reads image data from a memory using an address generated by a processor and inputs the read image data to the processor to perform image processing, when expanding the memory, the missing address of the processor is synchronized with the processor. an auxiliary address generator for generating and transmitting an auxiliary address to said memory;
JP1987139194U 1987-09-11 1987-09-11 Image processing device Expired - Lifetime JPH082756Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987139194U JPH082756Y2 (en) 1987-09-11 1987-09-11 Image processing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987139194U JPH082756Y2 (en) 1987-09-11 1987-09-11 Image processing device

Publications (2)

Publication Number Publication Date
JPS6443470U true JPS6443470U (en) 1989-03-15
JPH082756Y2 JPH082756Y2 (en) 1996-01-29

Family

ID=31402226

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987139194U Expired - Lifetime JPH082756Y2 (en) 1987-09-11 1987-09-11 Image processing device

Country Status (1)

Country Link
JP (1) JPH082756Y2 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS594054U (en) * 1982-06-25 1984-01-11 株式会社日立製作所 digital data processing equipment
JPS621047A (en) * 1985-02-14 1987-01-07 Nec Corp Semiconductor device containing memory circuit
JPS6295665A (en) * 1985-10-22 1987-05-02 Fujitsu Ltd Memory access control system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS594054U (en) * 1982-06-25 1984-01-11 株式会社日立製作所 digital data processing equipment
JPS621047A (en) * 1985-02-14 1987-01-07 Nec Corp Semiconductor device containing memory circuit
JPS6295665A (en) * 1985-10-22 1987-05-02 Fujitsu Ltd Memory access control system

Also Published As

Publication number Publication date
JPH082756Y2 (en) 1996-01-29

Similar Documents

Publication Publication Date Title
JPS6443470U (en)
JPS60116541U (en) Image data processing device
JPS6095652U (en) microcomputer device
JPS62175352U (en)
JPS6347641U (en)
JPS62135257U (en)
JPH03124248U (en)
JPS60131060U (en) Image processing device
JPS6421452U (en)
JPS5828465U (en) Facsimile signal processing circuit
JPS58142734U (en) Address generation circuit for bus-coupled system
JPH0191954U (en)
JPS60144147U (en) Module selection circuit
JPS60170801U (en) Control system switching device
JPS6316347U (en)
JPS5881794U (en) image search device
JPS62195863U (en)
JPS60116549U (en) Main/slave computer synchronization device
JPH0280851U (en)
JPS6413331U (en)
JPH02108486U (en)
JPS62199869U (en)
JPS61128746U (en)
JPS60152189U (en) Image data conversion circuit
JPH0270258U (en)