JPS60144147U - Module selection circuit - Google Patents
Module selection circuitInfo
- Publication number
- JPS60144147U JPS60144147U JP2733884U JP2733884U JPS60144147U JP S60144147 U JPS60144147 U JP S60144147U JP 2733884 U JP2733884 U JP 2733884U JP 2733884 U JP2733884 U JP 2733884U JP S60144147 U JPS60144147 U JP S60144147U
- Authority
- JP
- Japan
- Prior art keywords
- module
- address
- information
- address information
- module selection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の情報処理システムの構成図、第２図は本
考案に係る情報処理システムの構成図、第３図は第２図
のモジュールの詳細説明図である。
６−１・・・・・・アドレス更新回路、７・・・・・・
加算器、 −訃・・・・・比較器。FIG. 1 is a block diagram of a conventional information processing system, FIG. 2 is a block diagram of an information processing system according to the present invention, and FIG. 3 is a detailed explanatory diagram of the modules shown in FIG. 2. 6-1...Address update circuit, 7...
Adder, -訃...Comparator.
Claims (1)
該アドレス情報と該モジュール個有データとにより後段
モジュールのアドレス情報を発生するアドレス更新手段
と、該アドレス更新手段から出力さ糺るアドレス情報を
後段モジュールに出力する手段と、上位装置からのモジ
ュール選択情報を入力する手段と、前段モジュールから
のアドレス情報またはアドレス更新手段から出力される
アドレス情報を自モジュールのアドレスとし、自モジュ
ールアドレスとモジュール選択情報とを比較する比較回
路とからなるモジュールの選択回路。means for inputting address information from a previous module;
Address updating means for generating address information of a subsequent module based on the address information and the module-specific data; means for outputting the address information outputted from the address updating means to the subsequent module; and module selection from a host device. A module selection circuit comprising a means for inputting information, and a comparison circuit that takes the address information from the previous module or the address information output from the address update means as the address of the own module, and compares the own module address with module selection information. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2733884U JPS60144147U (en) | 1984-02-29 | 1984-02-29 | Module selection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2733884U JPS60144147U (en) | 1984-02-29 | 1984-02-29 | Module selection circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60144147U true JPS60144147U (en) | 1985-09-25 |
Family
ID=30524197
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2733884U Pending JPS60144147U (en) | 1984-02-29 | 1984-02-29 | Module selection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60144147U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013222491A (en) * | 2012-04-18 | 2013-10-28 | Powerchip Technology Corp | Semiconductor memory device, method of writing id code and high-order address thereof, tester device, and test method for tester device |
-
1984
- 1984-02-29 JP JP2733884U patent/JPS60144147U/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013222491A (en) * | 2012-04-18 | 2013-10-28 | Powerchip Technology Corp | Semiconductor memory device, method of writing id code and high-order address thereof, tester device, and test method for tester device |
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