JPS60126827U - Power-on control device - Google Patents
Power-on control deviceInfo
- Publication number
- JPS60126827U JPS60126827U JP1147384U JP1147384U JPS60126827U JP S60126827 U JPS60126827 U JP S60126827U JP 1147384 U JP1147384 U JP 1147384U JP 1147384 U JP1147384 U JP 1147384U JP S60126827 U JPS60126827 U JP S60126827U
- Authority
- JP
- Japan
- Prior art keywords
- power
- microprocessor
- power supply
- lsi
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Power Sources (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来における電源投入制御装置の構成例を示す
ブ冶ツク図、第２図は本考案の実施例を示すブロック図
である。
１１・・・マイクロプロセッサ、１３・・・スイッチ、
１４・・・ＬＳＩ、１７・・・フリップフロップ。FIG. 1 is a block diagram showing an example of the configuration of a conventional power-on control device, and FIG. 2 is a block diagram showing an embodiment of the present invention. 11...Microprocessor, 13...Switch,
14...LSI, 17...Flip-flop.
Claims (1)
ロプロセッサによるコントロールの下、利用時のみ該当
δ■への電源供給をＯＮすることにより所定の動作がな
されるマイクロコンピュータシステムにおいて、上記マ
イクロプロセッサから発せられる電源０Ｎ１０ＦＦコマ
ンドにより上記各ＬＳＩに対し電源供給を０Ｎ１０ＦＦ
する複数のスイッチ回路と、上記ＬＳＩのアクセス時、
上記マイクロプロセッサから発せられるイネーブル信号
によりセットされるフリップフロップと、このフリツー
ブフロツプのセット出力により上記マイクロプロセ
ッサへ強制的に割込み、あらかじめメモリに格納されで
ある電源ＯＮルーチンを起動し、このル ・ｊ−チン
を実行することにより上記スイッチ回路を介してＬＳＩ
に電源を供給する回路とを具備して成ることを特徴とす
る電源投入制御装置。In a microcomputer system composed of multiple LSI components and under the control of a microprocessor, a predetermined operation is performed by turning on the power supply to the corresponding δ■ only when in use, the power supply 0N10FF command issued from the microprocessor. The power supply is set to 0N10FF to each of the above LSIs.
When accessing the plurality of switch circuits and the above LSI,
The flip-flop is set by the enable signal issued from the microprocessor, and the set output of the flip-flop forcibly interrupts the microprocessor, starts a power-on routine stored in memory in advance, and executes this routine. - LSI is connected via the above switch circuit by executing
A power-on control device comprising: a circuit for supplying power to the circuit;
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1147384U JPS60126827U (en) | 1984-01-30 | 1984-01-30 | Power-on control device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1147384U JPS60126827U (en) | 1984-01-30 | 1984-01-30 | Power-on control device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60126827U true JPS60126827U (en) | 1985-08-26 |
Family
ID=30493625
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1147384U Pending JPS60126827U (en) | 1984-01-30 | 1984-01-30 | Power-on control device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60126827U (en) |
-
1984
- 1984-01-30 JP JP1147384U patent/JPS60126827U/en active Pending
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