JPS58122298U - Hybrid IC - Google Patents
Hybrid ICInfo
- Publication number
- JPS58122298U JPS58122298U JP1658482U JP1658482U JPS58122298U JP S58122298 U JPS58122298 U JP S58122298U JP 1658482 U JP1658482 U JP 1658482U JP 1658482 U JP1658482 U JP 1658482U JP S58122298 U JPS58122298 U JP S58122298U
- Authority
- JP
- Japan
- Prior art keywords
- chip
- complementary
- ram
- hybrid
- battery
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Static Random-Access Memory (AREA)
- Semiconductor Memories (AREA)
- Stand-By Power Supply Arrangements (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
図は本考案の１実施例であるハイブリッドＩＣの回路図
である。
１・・・ＣＭＯ３ＲＡＭチップ、２・・・バイポーラＲ
ＡＭチップ、３・・・Ｉ１０コントローラチップセレク
タ回路。The figure is a circuit diagram of a hybrid IC that is an embodiment of the present invention. 1...CMO3RAM chip, 2...Bipolar R
AM chip, 3...I10 controller chip selector circuit.
Claims (1)
力端子、出力端子を交互に接続した相補形ＭＯ８ＲＡＭ
チップ及びパイ示−ラＲＡＭチツ、 プと、同基板に
実装され、これら相補形ＭＯ３ＲＡＭチップ及びバイポ
ーラＲＡＭチップを夫々制御する入出力コントローラチ
ップセレクタ回路と、同基板に実装され、前記相補形Ｍ
Ｏ３ＲＡＭチップに接続された電池とを具備し、通常の
ＲＡＭ動作を前記バイポーラＲＡＭチップに・させかつ
データの保持を前記相補形ＭＯ３ＲＡＭチップをバッテ
リーバックアップすることにより行うことを特徴とする
ハイブリッドＩＣ０Complementary MO8RAM mounted on a board with a predetermined circuit pattern, with respective input terminals and output terminals connected alternately
An input/output controller chip selector circuit is mounted on the same board and controls the complementary MO3 RAM chip and the bipolar RAM chip, respectively.
A hybrid IC0 comprising: a battery connected to an O3RAM chip, allowing the bipolar RAM chip to perform normal RAM operations, and retaining data by backing up the complementary MO3RAM chip with a battery.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1658482U JPS58122298U (en) | 1982-02-09 | 1982-02-09 | Hybrid IC |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1658482U JPS58122298U (en) | 1982-02-09 | 1982-02-09 | Hybrid IC |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58122298U true JPS58122298U (en) | 1983-08-19 |
Family
ID=30028946
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1658482U Pending JPS58122298U (en) | 1982-02-09 | 1982-02-09 | Hybrid IC |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58122298U (en) |
-
1982
- 1982-02-09 JP JP1658482U patent/JPS58122298U/en active Pending
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