JPS59113828U - Power outage detection signal control circuit - Google Patents
Power outage detection signal control circuitInfo
- Publication number
- JPS59113828U JPS59113828U JP733983U JP733983U JPS59113828U JP S59113828 U JPS59113828 U JP S59113828U JP 733983 U JP733983 U JP 733983U JP 733983 U JP733983 U JP 733983U JP S59113828 U JPS59113828 U JP S59113828U
- Authority
- JP
- Japan
- Prior art keywords
- detection signal
- power
- outage detection
- power outage
- power failure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
図は本考案の一実施例を示すブロック図である。
図において、１０・・・・・・状態保持回路、１１・・
・・、。
ゲート回路、ｐｏｗ・・・・・・停電検出信号、Ｒ３Ｔ
・・・・・・リセット信号、ＥＮＤ・・・・・・再始動
処理終了信号、ＩＲＰ・・・・・・割込み信号。The figure is a block diagram showing one embodiment of the present invention. In the figure, 10...state holding circuit, 11...
.... Gate circuit, pow...Power failure detection signal, R3T
...Reset signal, END...Restart processing end signal, IRP...Interrupt signal.
Claims (1)
てプログラムを始動して停電再始動処理を実行し、停電
検出信号が割込み入力端子に入力されると停電処理プロ
グラムを実行する中央制御部を備えた情報処理装置にお
いて、前記中央制御部は停電再始動処理の完了時に再始
動処理終了信号を出力するように構成され、該再始動処
理終了信号によってセットされ前記リセット信号によっ
てリセットされる状態保持回路と、該状態保持回路の出
力によって開閉されるゲートとを備えて、前記停電検出
信号を該ゲートを通して前記割込み入力端子に供給する
ことを特徴とする停電検出信号制御回路。Information equipped with a central control unit that starts a program with a reset signal supplied from the power supply unit when the power is restored to execute power failure restart processing, and executes the power failure processing program when a power failure detection signal is input to the interrupt input terminal. In the processing device, the central control unit is configured to output a restart processing end signal upon completion of the power failure restart processing, and a state holding circuit that is set by the restart processing end signal and reset by the reset signal; A power outage detection signal control circuit comprising: a gate that is opened and closed by the output of the state holding circuit, and supplies the power outage detection signal to the interrupt input terminal through the gate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP733983U JPS59113828U (en) | 1983-01-24 | 1983-01-24 | Power outage detection signal control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP733983U JPS59113828U (en) | 1983-01-24 | 1983-01-24 | Power outage detection signal control circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59113828U true JPS59113828U (en) | 1984-08-01 |
Family
ID=30138874
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP733983U Pending JPS59113828U (en) | 1983-01-24 | 1983-01-24 | Power outage detection signal control circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59113828U (en) |
-
1983
- 1983-01-24 JP JP733983U patent/JPS59113828U/en active Pending
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