JPS6116631U - Power cutoff device for computer peripheral storage devices - Google Patents

Power cutoff device for computer peripheral storage devices

Info

Publication number
JPS6116631U
JPS6116631U JP9812884U JP9812884U JPS6116631U JP S6116631 U JPS6116631 U JP S6116631U JP 9812884 U JP9812884 U JP 9812884U JP 9812884 U JP9812884 U JP 9812884U JP S6116631 U JPS6116631 U JP S6116631U
Authority
JP
Japan
Prior art keywords
peripheral storage
switch
power switch
storage devices
cutoff device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9812884U
Other languages
Japanese (ja)
Inventor
正弘 斎藤
幸男 三品
Original Assignee
株式会社島津製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社島津製作所 filed Critical 株式会社島津製作所
Priority to JP9812884U priority Critical patent/JPS6116631U/en
Publication of JPS6116631U publication Critical patent/JPS6116631U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本考案の1実施例を示す概略ブロック回路図
であり、第2図は該実施例による動作シーケンス例を示
すタイムチャート、第3図は他の実施例を示す概略ブロ
ック図、第4図は従来例の電源回路ブロック図である。 10は電源、sw2,sw4は手動スイッチ、SW3,
SW5は第2スイッチ、11はCPU,2は外部記憶装
置、13はパワーオフ、タイマー、14はインターフェ
ースである。
FIG. 1 is a schematic block circuit diagram showing one embodiment of the present invention, FIG. 2 is a time chart showing an example of an operation sequence according to the embodiment, and FIG. 3 is a schematic block diagram showing another embodiment. FIG. 4 is a block diagram of a conventional power supply circuit. 10 is a power supply, sw2, sw4 are manual switches, SW3,
SW5 is a second switch, 11 is a CPU, 2 is an external storage device, 13 is a power off/timer, and 14 is an interface.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] コンピュータのCPU及び周辺記憶装置に共通な電源手
動スイッチと、、同様に両者につながり、該電源手動ス
イッチと並列に設けた電源の第2スイッチとを具有して
、この場合第2スイッチはタイマーを介して又は直接に
CPUの制御により自動開閉するようにして、電源手動
スイッチのオンと連動して第2スイッチもオンとなるが
、電源手動スイッチがオフになやと、その信号によりC
P)Uが周辺記憶装置に動作終了を指示し、その終了に
より第2スイッチが自動的に,オフとなるようにしたこ
とを特徴とする、コンピュータ周辺記憶装置の電源遮断
装置。
The computer has a manual power switch common to the CPU and the peripheral storage device, and a second power switch connected to both and provided in parallel with the manual power switch, in which case the second switch operates a timer. The second switch is automatically opened and closed under the control of the CPU or directly under the control of the CPU, and the second switch is also turned on in conjunction with the turning on of the manual power switch.However, when the manual power switch is turned off, the signal causes the
P) A power cutoff device for a computer peripheral storage device, characterized in that U instructs the peripheral storage device to end its operation, and upon the completion of the operation, the second switch is automatically turned off.
JP9812884U 1984-06-29 1984-06-29 Power cutoff device for computer peripheral storage devices Pending JPS6116631U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9812884U JPS6116631U (en) 1984-06-29 1984-06-29 Power cutoff device for computer peripheral storage devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9812884U JPS6116631U (en) 1984-06-29 1984-06-29 Power cutoff device for computer peripheral storage devices

Publications (1)

Publication Number Publication Date
JPS6116631U true JPS6116631U (en) 1986-01-30

Family

ID=30657680

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9812884U Pending JPS6116631U (en) 1984-06-29 1984-06-29 Power cutoff device for computer peripheral storage devices

Country Status (1)

Country Link
JP (1) JPS6116631U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009125521A1 (en) * 2008-04-10 2009-10-15 富士通テン株式会社 Electronic device and electronic system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009125521A1 (en) * 2008-04-10 2009-10-15 富士通テン株式会社 Electronic device and electronic system
JP2009248934A (en) * 2008-04-10 2009-10-29 Fujitsu Ten Ltd Electronic device and electronic system

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