JPS6217181U - - Google Patents
Info
- Publication number
- JPS6217181U JPS6217181U JP10685485U JP10685485U JPS6217181U JP S6217181 U JPS6217181 U JP S6217181U JP 10685485 U JP10685485 U JP 10685485U JP 10685485 U JP10685485 U JP 10685485U JP S6217181 U JPS6217181 U JP S6217181U
- Authority
- JP
- Japan
- Prior art keywords
- conductive pattern
- circuit board
- integrated circuit
- hybrid integrated
- coating layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011247 coating layer Substances 0.000 claims description 3
- 239000000853 adhesive Substances 0.000 claims 1
- 230000001070 adhesive effect Effects 0.000 claims 1
- 239000011347 resin Substances 0.000 claims 1
- 229920005989 resin Polymers 0.000 claims 1
- 238000007789 sealing Methods 0.000 claims 1
- 229910000679 solder Inorganic materials 0.000 claims 1
Landscapes
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
Description
第1図は、本考案に係る第1実施例を示す厚膜
混成集積回路基板の要部の拡大図、第2図は、本
考案に係る第2実施例を示す厚膜混成集積回路基
板の要部の拡大図である。
10,11…厚膜混成集積回路基板、20,2
1…導電パターン、20a,21a…高電位の導
電パターン、20b,21b…低電位の導電パタ
ーン、30,31…被膜層、40…ICチツプ。
FIG. 1 is an enlarged view of the main parts of a thick film hybrid integrated circuit board showing a first embodiment of the present invention, and FIG. 2 is an enlarged view of a thick film hybrid integrated circuit board showing a second embodiment of the invention. It is an enlarged view of the main part. 10, 11... Thick film hybrid integrated circuit board, 20, 2
1... Conductive pattern, 20a, 21a... High potential conductive pattern, 20b, 21b... Low potential conductive pattern, 30, 31... Coating layer, 40... IC chip.
Claims (1)
位にある導電パターンの前記低電位にある導電パ
ターンと対向した部分に被膜層を形成することを
特徴とする厚膜混成集積回路基板。 (2) 前記被膜層は、半田又は接着剤又は封止用
樹脂で形成することを特徴とする実用新案登録請
求の範囲第1項記載の厚膜混成集積回路基板。[Claims for Utility Model Registration] (1) A thickness characterized in that a coating layer is formed on a portion of a conductive pattern at a high potential adjacent to a conductive pattern at a low potential that faces the conductive pattern at a low potential. Film hybrid integrated circuit board. (2) The thick film hybrid integrated circuit board according to claim 1, wherein the coating layer is formed of solder, adhesive, or sealing resin.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10685485U JPS6217181U (en) | 1985-07-15 | 1985-07-15 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10685485U JPS6217181U (en) | 1985-07-15 | 1985-07-15 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6217181U true JPS6217181U (en) | 1987-02-02 |
Family
ID=30982599
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10685485U Pending JPS6217181U (en) | 1985-07-15 | 1985-07-15 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6217181U (en) |
-
1985
- 1985-07-15 JP JP10685485U patent/JPS6217181U/ja active Pending
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