JPS5939940U - Hybrid integrated circuit device - Google Patents
Hybrid integrated circuit deviceInfo
- Publication number
- JPS5939940U JPS5939940U JP13541882U JP13541882U JPS5939940U JP S5939940 U JPS5939940 U JP S5939940U JP 13541882 U JP13541882 U JP 13541882U JP 13541882 U JP13541882 U JP 13541882U JP S5939940 U JPS5939940 U JP S5939940U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- circuit device
- hybrid integrated
- protrusion
- insulating substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来の混成集積回路装置を流動槽に浸漬する前
の状態を説明する説明図、第2図は同混成集積回路装置
を流動槽に浸漬した後の状態を説明する説明図、第3図
aは従来の混成集積回路装置を示す平面図、第3図すは
同側面図、第4図は従来の混成集積回路装置の塗膜状態
を示す断面図、第5図、第6図は本考案の混成集積回路
装置に係り、第5図aは同平面図、第5図すは同側面図
、第6図は同塗膜状態を示す断面図である。
1・・・混成集積回路装置、3・・・絶縁基板、4・・
・チップ部品、5・・・突出部、8・・・塗膜。
(0)
第3図
(b)Fig. 1 is an explanatory diagram illustrating the state of a conventional hybrid integrated circuit device before it is immersed in a fluidized tank; FIG. 3a is a plan view showing a conventional hybrid integrated circuit device, FIG. 5A is a plan view of the hybrid integrated circuit device of the present invention, FIG. 5A is a side view of the same, and FIG. 6 is a sectional view showing the state of the coating film. 1... Hybrid integrated circuit device, 3... Insulating substrate, 4...
・Chip parts, 5... protrusion, 8... coating film. (0) Figure 3(b)
Claims (2)
を設けたことを特徴とする混成集積回路装置。(1) A hybrid integrated circuit device characterized in that protrusions are provided between components formed close to each other on an insulating substrate.
用新案登録請求の範囲第1項記載の混成集積回路装置。(2) The hybrid integrated circuit device according to claim 1, wherein the protrusion is made of solder.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13541882U JPS5939940U (en) | 1982-09-07 | 1982-09-07 | Hybrid integrated circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13541882U JPS5939940U (en) | 1982-09-07 | 1982-09-07 | Hybrid integrated circuit device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5939940U true JPS5939940U (en) | 1984-03-14 |
Family
ID=30304802
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13541882U Pending JPS5939940U (en) | 1982-09-07 | 1982-09-07 | Hybrid integrated circuit device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5939940U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62291157A (en) * | 1986-06-11 | 1987-12-17 | Nec Corp | Hybrid integrated circuit |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5756990A (en) * | 1980-09-22 | 1982-04-05 | Matsushita Electric Works Ltd | Method of mounting electronic part |
-
1982
- 1982-09-07 JP JP13541882U patent/JPS5939940U/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5756990A (en) * | 1980-09-22 | 1982-04-05 | Matsushita Electric Works Ltd | Method of mounting electronic part |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62291157A (en) * | 1986-06-11 | 1987-12-17 | Nec Corp | Hybrid integrated circuit |
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