JPS62171263U - - Google Patents

Info

Publication number
JPS62171263U
JPS62171263U JP1986058947U JP5894786U JPS62171263U JP S62171263 U JPS62171263 U JP S62171263U JP 1986058947 U JP1986058947 U JP 1986058947U JP 5894786 U JP5894786 U JP 5894786U JP S62171263 U JPS62171263 U JP S62171263U
Authority
JP
Japan
Prior art keywords
signal
vertical synchronization
circuit
output transistor
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1986058947U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986058947U priority Critical patent/JPS62171263U/ja
Priority to EP87902721A priority patent/EP0269741B1/en
Priority to PCT/JP1987/000230 priority patent/WO1987006414A1/en
Priority to DE87902721T priority patent/DE3787619T2/en
Priority to US07/141,359 priority patent/US4789896A/en
Priority to KR1019870003692A priority patent/KR930003563B1/en
Publication of JPS62171263U publication Critical patent/JPS62171263U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/04—Synchronising

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Synchronizing For Television (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は、本考案の一実施例を示す回路図、第
２図は従来の同期信号発生装置を示す回路図、及
び第３図イ乃至ハは第１図の説明は供するための
波形図である。 ８……分周回路、１３……第１垂直同期分離回
路、２０……出力トランジスタ、２１……ダイオ
ード、２３……可変抵抗、２４……第２トランジ
スタ、２５……抵抗、２６……第３トランジスタ
、２７……第２垂直同期分離回路、３６……第６
トランジスタ。 FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a circuit diagram showing a conventional synchronizing signal generator, and FIGS. It is. 8... Frequency divider circuit, 13... First vertical synchronization separation circuit, 20... Output transistor, 21... Diode, 23... Variable resistor, 24... Second transistor, 25... Resistor, 26...... 3 transistors, 27...second vertical synchronization separation circuit, 36...sixth
transistor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 映像信号中の垂直同期信号を抽出する第１垂直
同期分離回路の出力信号がリセツト信号として印
加され、前記映像信号中の水平同期信号に応じた
信号がクロツク信号として印加される分周回路を
用いて垂直駆動パルスを発生するカウントダウン
方式の同期信号発生装置において、前記分周回路
の出力信号がベースに印加され、エミツタに負荷
を有する出力トランジスタと、前記映像信号中か
ら垂直同期信号を抽出する第２垂直同期分離回路
と、前記出力トランジスタのエミツタと前記負荷
との接続中点に接続され、前記出力トランジスタ
に流れる電流を前記第２垂直同期分離回路に応じ
て変化させる手段と、該手段に応じて変化する前
記出力トランジスタに流れる電流を検知して、前
記分周回路をリセツトする手段とから成ることを
特徴とする同期信号発生装置。 A frequency dividing circuit is used in which an output signal of a first vertical synchronization separation circuit for extracting a vertical synchronization signal from a video signal is applied as a reset signal, and a signal corresponding to a horizontal synchronization signal in the video signal is applied as a clock signal. In a countdown type synchronization signal generator that generates a vertical drive pulse using a frequency divider circuit, the output signal of the frequency dividing circuit is applied to a base, an output transistor having a load on an emitter, and a transistor that extracts a vertical synchronization signal from the video signal. a second vertical synchronization separation circuit, a means connected to a connection midpoint between the emitter of the output transistor and the load, and for changing a current flowing through the output transistor in accordance with the second vertical synchronization separation circuit; and means for detecting a current flowing through the output transistor, which changes with the change in frequency, and resetting the frequency dividing circuit.
JP1986058947U 1986-04-14 1986-04-18 Pending JPS62171263U (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP1986058947U JPS62171263U (en) 1986-04-18 1986-04-18
EP87902721A EP0269741B1 (en) 1986-04-14 1987-04-13 Circuit for generating vertical synchronizing pulses
PCT/JP1987/000230 WO1987006414A1 (en) 1986-04-14 1987-04-13 Circuit for generating vertical synchronizing pulses
DE87902721T DE3787619T2 (en) 1986-04-14 1987-04-13 CIRCUIT TO GENERATE VERTICAL SYNCHRONIZING CURRENTS.
US07/141,359 US4789896A (en) 1986-04-14 1987-04-13 Vertical synchronizing pulse generating circuit
KR1019870003692A KR930003563B1 (en) 1986-04-18 1987-04-17 Synchronizing pulse generating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986058947U JPS62171263U (en) 1986-04-18 1986-04-18

Publications (1)

Publication Number Publication Date
JPS62171263U true JPS62171263U (en) 1987-10-30

Family

ID=13099021

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986058947U Pending JPS62171263U (en) 1986-04-14 1986-04-18

Country Status (2)

Country Link
JP (1) JPS62171263U (en)
KR (1) KR930003563B1 (en)

Also Published As

Publication number Publication date
KR870010733A (en) 1987-11-30
KR930003563B1 (en) 1993-05-06

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