KR870010733A - Synchronous signal generator - Google Patents

Synchronous signal generator Download PDF

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Publication number
KR870010733A
KR870010733A KR870003692A KR870003692A KR870010733A KR 870010733 A KR870010733 A KR 870010733A KR 870003692 A KR870003692 A KR 870003692A KR 870003692 A KR870003692 A KR 870003692A KR 870010733 A KR870010733 A KR 870010733A
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KR
South Korea
Prior art keywords
signal
vertical
output
circuit
signal generator
Prior art date
Application number
KR870003692A
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Korean (ko)
Other versions
KR930003563B1 (en
Inventor
히로야쓰 기시
히로미 아라이
Original Assignee
이우에 사또시
상요덴기 가부시기 가이샤
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Application filed by 이우에 사또시, 상요덴기 가부시기 가이샤 filed Critical 이우에 사또시
Publication of KR870010733A publication Critical patent/KR870010733A/en
Application granted granted Critical
Publication of KR930003563B1 publication Critical patent/KR930003563B1/en

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/04—Synchronising

Abstract

내용 없음No content

Description

동기신호 발생장치Synchronous signal generator

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제 1 도는 본 발명의 일실시예를 도시한 회로도.1 is a circuit diagram showing an embodiment of the present invention.

제 2 도는 종래의 동기신호 발생장치를 도시한 회로도.2 is a circuit diagram showing a conventional synchronization signal generator.

제 3(가)도 내지 (나)는 제 1도의 설명에 제공하기 위한 파형도.3 (a) to (b) are waveform diagrams for providing the description of FIG.

Claims (1)

영상신호 중의 수직 동기신호를 수출하는 제1 수직 동기분리 회로의 출력 신호가 리셋트 신호로서 인가되고, 상기 영상신호 중의 수평동기 신호에 따른 신호가 클럭신호로서 인가되는 분주회로를 사용해서 수직 구동펄스를 발생하는 카운트다운 방식의 동기신호 발생장치에 있어서, 상기 분주회로의 출력신호가 베이스에 인가되며, 에미터에 부하를 갖는 출력 트랜지스터와, 상기 영상신호 중에서 수직 동기신호를 추출하는 제 2수직 동기 분리회로와, 상기 출력 트랜지스터의 에미터와 상기 부하와의 접속 중점에 접속되고, 상기 출력 트랜지스터에 흐르는 전류를 상기 제 2 수직 동기 분리 회로에 따라서 변화시키는 수단과, 이 수단에 따라서 변화하는 상기 출력 트랜지스터에 흐르는 전류를 검지하여, 상기 분주회로를 리셋트하는 수단으로 이루어진 것을 특징으로 하는 동기신호 발생장치.The output signal of the first vertical synchronizing separation circuit which exports the vertical synchronizing signal in the video signal is applied as a reset signal, and the vertical driving pulse is applied by using a division circuit in which a signal corresponding to the horizontal synchronizing signal in the video signal is applied as a clock signal. A countdown type synchronization signal generator for generating a signal, the output signal of the frequency divider circuit being applied to a base, the output transistor having a load on an emitter, and a second vertical synchronization extracting a vertical synchronization signal from the image signal. Means for changing a current flowing through the output transistor in accordance with the second vertical synchronous separation circuit, connected to a separation circuit, an emitter of the output transistor and the load midpoint, and the output varying in accordance with the means. Means for detecting a current flowing through the transistor and resetting the frequency divider circuit. Synchronization signal generator, characterized in that. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019870003692A 1986-04-18 1987-04-17 Synchronizing pulse generating circuit KR930003563B1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP?61-58947 1986-04-18
JP1986058947U JPS62171263U (en) 1986-04-18 1986-04-18
JP58947 1989-04-18

Publications (2)

Publication Number Publication Date
KR870010733A true KR870010733A (en) 1987-11-30
KR930003563B1 KR930003563B1 (en) 1993-05-06

Family

ID=13099021

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019870003692A KR930003563B1 (en) 1986-04-18 1987-04-17 Synchronizing pulse generating circuit

Country Status (2)

Country Link
JP (1) JPS62171263U (en)
KR (1) KR930003563B1 (en)

Also Published As

Publication number Publication date
KR930003563B1 (en) 1993-05-06
JPS62171263U (en) 1987-10-30

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