KR950007718Y1 - Horizon/vertical tunning separating circuit - Google Patents

Abstract

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Description

Horizontal and vertical synchronous separation circuit

1 is a block diagram of a synchronous separation circuit of the present invention.

FIG. 2 is a detailed circuit diagram of the synchronous separation circuit section in FIG.

3 is a timing chart of a composite synchronization signal.

4A to 4D are signal waveforms for explanation in FIG.

* Explanation of symbols for main parts of the drawings

VIN: Video Input Terminal VCO: Video + Text Output Terminal

OSD: On Screen Display CM: Character Mixer

CG: Character generator CSS: Synchronous Synchronizer

SS: Synchronous Separator u-com: Microcomputer

OP ₁ , OP ₂ : Comparator NAND: NAND Gate

R ₁ -R ₄ : Resistor VD: Vertical sync signal terminal

HD: Horizontal Sync Signal Terminal

The present invention relates to a horizontal and vertical sync separation circuit that separates horizontal (HD) and vertical (VD) sync signals, which are reference sync signals of a video signal, to display characters on a TV screen.

The conventional horizontal and vertical synchronizing separation circuit constituting system is composed of a phase comparator for comparing and outputting a composite synchronous signal, and a feedback and Schmitt trigger circuit for feeding back the signal compared with the phase comparator.

However, according to the configuration of the conventional horizontal and vertical synchronization circuits, the horizontal and vertical synchronization signals are compared on a phase comparator, and the separated horizontal and vertical synchronization signals are used as character generation reference signals on the on-screen display unit to display on the screen of the TV. Characters were displayed, but this did not reduce the cost of the set due to the relatively complicated circuit configuration.

The present invention separates the horizontal (HD) and vertical (VD) sync signals, which are the reference sync signals of the video signal, from the complex sync and uses the separated horizontal and vertical sync signals as reference signals. Reduce the cost of the set by simply configuring the sync separator at low cost in a system configured to display the characters on the screen of the screen and to mix them with the video signal and to display the characters on the screen of the TV. The present invention will be described in detail with reference to the accompanying drawings as follows.

As shown in FIG. 1, the video input terminal VIN is connected to the complex sync separator CSS and the character mixer CM in the on-screen display OSD, and the character mixer CM is In the well-known thing connected to the character generating unit (CG) and the video + character output terminal (VCO) under the control of the microcomputer (μ-COM), between the composite synchronization separating unit (CSS) and the character generating unit (CG) It is configured by connecting the sync separation unit (SS) to separate the horizontal (HD), vertical (VD) synchronization signal to display the characters on the screen.

FIG. 2 is a detailed circuit diagram of the sync separator SS. As shown therein, the composite sync signal terminal is inverted input (-) terminal of the comparator OP ₁ through the resistor R ₁ in the sync separator SS. And the non-inverting input (+) terminal of the comparator OP ₁ to the other (②) input terminal of the NAND gate and NAND, respectively, and the non-inverting input (+) terminal of the comparator OP ₁ . ₂ ) is connected to the inverting input (-) terminal of the comparator (OP ₂ ) through the Vcc power terminal and the resistor (R ₃ ), and the output terminal of the comparator (OP ₁ ) through the resistor (R ₄ ) OP ₂ ) is connected to the non-inverting input (+) terminal, and the output terminal of the comparator (OP ₂ ) is connected to the vertical synchronization signal terminal (VD) and one side (①) input terminal of the NAND gate (NAND), The output terminal of the NAND gate is connected to the horizontal synchronous signal terminal HD.

Referring to the effect of the present invention configured in this way in detail as follows.

First, open loop gain characteristics of OP ₁ and OP ₂ are shown in Table 1.

TABLE 1

In the vertical (VD) and horizontal (HD) Fourier series expansion equation, the vertical (VD) and horizontal (HD) signals are called f (t), and this f (t) is an odd function (odd). function)

Becomes

In other words, if you look at the vertical expansion of the puuri

here

This fv (t) is represented as a spectrum as follows.

Next, look at the water supply expansion expression on horizontal (HD) puuri,

Where Wo = 2π f _H = 2π / T _H = 98859HZ

f _H = 15734 HZ

f _H (t) = 0.135 + 0.6 sin (wot) + 0.532 sin (2 wot) +. + (-0.124) sin (10 wo t) +... (Equation 2)

This f _H (t) is represented by the spectrum as follows.

Becomes

Next, as can be seen from Equation 1, the characteristic of VD according to the characteristic of OP _1, the VD signal is composed of the DC component a ₀ of the signal and the respective frequencies (f ₁ , f ₂ … f ₁₀ … f ₁₀₀ …). Able to know.

Considering only the frequency component up to f ₁₀₀ , VD is as follows.

Since the signal (b) can be sufficiently amplified by OP ₁ (60 DB or more), the VD component is output compared with the reference voltage V _REF .

As can be seen from Equation 2, the HD signal is composed of the DC component a ₀ of the signal and the respective frequencies (f ₁ , f ₂ ... F ₁₀ ...).

Considering only the frequency components up to f, HD is as follows.

Since this (d) signal is weakly amplified by OP ₁ (below 30dB), the HD component hardly appears when compared with the reference voltage V _REF .

In other words, in the present invention, as shown in FIG. 2, when the composite synchronization signal as shown in FIG. 4a is input to the composite synchronization signal terminal CS, the input composite synchronization signal is inputted to the other side (②) input terminal of the NAND gate. Since the signal is applied to the input inverting (-) terminal of the comparator OP ₁ through the resistor R ₁ , the comparator OP ₁ compares the signal with the reference voltage V _REF of its input non-inverting (+) terminal. Outputs

I.e., the comparator (OP _1), the input inversion of - the output of the voltage applied to the terminal is higher than the reference voltage applied to its non-inverting (+) terminal the comparator (OP ₁₎ in the output a low signal comparator (OP ₁₎ () Only the VD signal as shown in FIG. 4B is output to the terminal.

When the VD signal output from the comparator OP ₁ is applied to the input non-inverting (+) terminal of the comparator OP ₂ through the resistor R ₄ , the comparator OP ₂ refers to the reference of its input inverting (-) terminal. The output signal is compared by comparing the voltage V _REF .

I.e., the comparator input the non-inverting (+) the voltage applied to the terminal of his input inversion of (OP ₂₎ - of the higher than the reference voltage applied to the terminal a comparator (OP ₂₎ is a high signal to the output comparator (OP ₂₎ () Only the VD signal as shown in FIG. 4C in which the HD signal is completely removed from the output terminal is output to the vertical synchronous signal terminal VD.

On the other hand, the VD signal output from the comparator OP ₂ is applied to one side (①) input terminal of the NAND gate, and the composite synchronous signal is already applied to the other terminal (②) terminal of the NAND gate. The low signal is output and the HD signal as shown in FIG. 4d is output to the horizontal synchronization signal terminal HD.

The output HD and VD signals are input to the character generator CG in the on-screen display unit as a reference signal for character generation. When the character signal generated based on the signal is applied to the character mixer CM, In the text mixer CM, after mixing the text signal and the video signal applied thereto, the mixed text signal is output to the video + text output terminal VCO so that the text is displayed on the screen of the TV.

As described above, according to the present invention, it is possible to reduce cost by constructing a simple synchronization separator with a low cost to display a character on a TV screen by separating horizontal (HD) and vertical (VD) synchronization signals. It is.

Claims (1)

A normal video input terminal (VIN) is connected to the composite mixer (CSS) and the character mixer (CM) in the on-screen display (OSD), and the character mixer (CM) is connected to the microcomputer (μ-COM). In the well-known thing connected to the character generating unit (CG) and the video + character output terminal (VCO) to be controlled, the horizontal (HD), vertical between the composite synchronization separator (CSS) and the character generating unit (CG) (VD) composite synchronizing signal to the inverting input terminal of the comparator (OP ₁₎ connected to the separated synchronization signal a resistance (R ₂₎ to display the characters on the TV screen, (R ₃₎ to the non-inverting input terminal connecting the terminal (CS) connected to its output to the noninverting input terminal of the comparator (OP ₂₎ and connected to the inverting terminal of the comparator (OP ₂₎ to the non-inverting terminal of the comparator (OP _1), and a comparator (OP ₂₎ The output terminal of the NAND and the composite synchronous signal terminal CS are connected to both inputs of the NAND gate, and the output of the NAND gate is connected to the horizontal synchronous signal terminal HD. And horizontal and vertical synchronous separation circuits by connecting the output of the comparator (OP ₂ ) to the vertical synchronous signal terminal (VD).