KR870002271Y1 - Horizontal pulse frequency stabilization circuit of television - Google Patents

Horizontal pulse frequency stabilization circuit of television Download PDF

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Publication number
KR870002271Y1
KR870002271Y1 KR2019840012174U KR840012174U KR870002271Y1 KR 870002271 Y1 KR870002271 Y1 KR 870002271Y1 KR 2019840012174 U KR2019840012174 U KR 2019840012174U KR 840012174 U KR840012174 U KR 840012174U KR 870002271 Y1 KR870002271 Y1 KR 870002271Y1
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horizontal
horizontal pulse
pulse
television
push
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KR2019840012174U
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KR860006853U (en
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조현덕
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삼성전자 주식회사
정재은
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
    • H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
    • H04N3/16—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections
    • H04N3/18—Generation of supply voltages, in combination with electron beam deflecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F38/00—Adaptations of transformers or inductances for specific applications or functions
    • H01F38/42—Flyback transformers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K4/00—Generating pulses having essentially a finite slope or stepped portions
    • H03K4/06—Generating pulses having essentially a finite slope or stepped portions having triangular shape
    • H03K4/08—Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Synchronizing For Television (AREA)

Abstract

내용 없음.No content.

Description

텔레비젼의 수평 펄스 주파수 안정화 회로TV's Horizontal Pulse Frequency Stabilization Circuit

제 1 도는 종래의 주파수안정화회로도.1 is a conventional frequency stabilization circuit diagram.

제 2 도는 본 고안의 회로도.2 is a circuit diagram of the present invention.

제 3 도는 본 고안의 파형도이다.3 is a waveform diagram of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

11 : 톱니파 발생회로 12 : 수평펄스 발진기11: sawtooth wave generating circuit 12: horizontal pulse oscillator

PS : 푸쉬동기신호단 PF : 수평플라이백펄스단PS: Push sync signal stage PF: Horizontal flyback pulse stage

본 고안은 푸쉬동기신호만을 가지고 텔레비젼의 수평 펄스주파수를 안정화시키는 전자회로에 관한 것이다. 텔레비젼의 수평펄스주파수를 안정화시키는 수단으로서, 종래에는 제 1 도에 도시되어 있는 것과 같은 푸쉬-풀 동기신호를 이용하는 안정화회로가 소개되어 있는 바, 그 동작은 다음과 같이 실시된다.The present invention relates to an electronic circuit that stabilizes the horizontal pulse frequency of a television with only a push synchronous signal. As a means for stabilizing the horizontal pulse frequency of a television, a stabilization circuit using a push-pull synchronous signal as shown in Fig. 1 is conventionally introduced. The operation is performed as follows.

영상신호에서 분리해낸 푸쉬 동기신호(push sync)와 풀(pull sync)은 X단자와 Y단자를 통해서 콘덴서(C11)(C12)를 거치게 되는데, 이때 불필요한 DC 성분은 빠지고 AC 성분만이 저항(R11)(R12)의 양단에 나타난다.The push sync and pull sync separated from the video signal pass through the capacitor (C 11 ) and (C 12 ) through the X and Y terminals. Appear at both ends of (R 11 ) (R 12 ).

한편, 텔레비젼의 화상처리계통에 가해졌다가 궤환되어서 나오는 수평 플라이백 펄스(H-flyback pulse)는 톱니파형 발생부(11)에 인가되어 톱니파로 변환된 후에 접속점(Z)에서 푸쉬-풀 동기신호와 비교된다.On the other hand, a horizontal flyback pulse (H-flyback pulse) applied to the image processing system of the television and fed back is applied to the sawtooth waveform generating unit 11 and converted into a sawtooth wave, and then a push-pull synchronization signal at the connection point Z. Is compared with.

만일, 정상위상보다 느린 펄스파형이 입력되면 그에 해당되는 시정수에 의해서 수평펄스 발진기(12)가 조금 빠른 위상쪽으로 동작하여 정상적인 수평펄스로 안정화시키고, 정상위상보다 빠른 펄스파형이 입력되면 수평펄스 발진기(12)가 조금 느린 위상쪽으로 동작하여 수평펄스를 안정화시킨다.If a pulse waveform slower than the normal phase is inputted, the horizontal pulse oscillator 12 operates toward a slightly faster phase by a time constant corresponding thereto to stabilize the normal horizontal pulse, and if a pulse waveform faster than the normal phase is inputted, the horizontal pulse oscillator (12) operates toward a slightly slower phase to stabilize the horizontal pulse.

전술한 종래의 안정화회로는 그 동작상에 이상은 없으나, 동기신호를 푸쉬형과 풀형이 두가지 모두 사용해야 하므로 이를 위한 신호처리계통이 이중으로 되고, 만일 한쪽의 동기신호에 이상이 발생할 경우에 다른 하나의 동기신호가 정상적일지라도 주파수 안정화의 목적을 구현할 수 없는 문제점을 가지고 있다.The above-described conventional stabilization circuit has no abnormality in its operation, but since the push type and the pull type must be used for both of the synchronization signals, the signal processing system for this is doubled, and if one synchronization signal is abnormal, the other Even though the synchronization signal is normal, there is a problem that the purpose of frequency stabilization cannot be realized.

본 고안은 상기한 수평펄스주파수 안정화수단을 개선시킨 것으로서, 단일의 동기신호로 수평펄스 발진기를 안정화시키므로서 회로구조를 간단하게 하고 이와 함께 공정수감소, 원가절감의 효과를 거두기 위하여 안출된 것이다.The present invention is an improvement on the horizontal pulse frequency stabilization means, by stabilizing the horizontal pulse oscillator with a single synchronous signal to simplify the circuit structure and to reduce the number of processes, cost reduction effect.

이하 본 고안의 구성 및 작용, 효과를 예시도면에 의거하여 상세히 설명하면 다음과 같다.Hereinafter, the configuration, operation, and effects of the present invention will be described in detail with reference to the accompanying drawings.

본 고안은 푸쉬 동기신호단(PS)을 커플링콘덴서(C1)와 콘덴서(C2)및 트랜지스터(Q1)의 베이스측에 연결하고, 수평 플라이백펄스단(HF)을 톱니파 발생회로(11)를 매개하여 커플링콘덴서(C3)에 연결하며, 콘덴서(C1)와 콘덴서 (C3)의 접속점에 트랜지스터(Q1)의 콜렉터를 연결하고, 트랜지스터(Q1)의 콜렉터를 수평펄스 발진기(12)측에 연결한 구조로 되어 있다.The present invention connects the push sync signal stage PS to the coupling capacitor C 1 , the capacitor C 2 , and the base side of the transistor Q 1 , and the horizontal flyback pulse stage HF to the sawtooth wave generating circuit ( 11) is connected to the coupling capacitor C 3 , the collector of transistor Q 1 is connected to the connection point of capacitor C 1 and capacitor C 3 , and the collector of transistor Q 1 is horizontal. The structure is connected to the pulse oscillator 12 side.

제 2 도는 상기한 구조로 되어있는 본 고안의 회로도이고 제 3 도는 본 고안의 파형도로서, 푸쉬 동기신호단(PS)에는 영상신호에서 분리된 푸쉬동기신호가 입력되고(제 3(a) 도). 이 신호는 커플링콘덴서(C1)와 트랜지스터(Q1)의 베이스측에 인가된다.2 is a circuit diagram of the present invention having the above-described structure, and FIG. 3 is a waveform diagram of the present invention, wherein a push synchronization signal separated from an image signal is input to the push synchronization signal terminal PS (Fig. 3 (a)). ). This signal is applied to the base side of the coupling capacitor C 1 and the transistor Q 1 .

또한 궤환된 수평 플라이백펄스는 수평 플라이백펄스단(HF)을 통해서 톱니파 발생회로(11)에 가해진다. 톱니파 발생회로(11)에서는 제 3(b) 도와 같은 톱니파가 발생하여 커플링콘덴서(C3)를 통과한다.In addition, the feedback horizontal flyback pulse is applied to the sawtooth wave generating circuit 11 through the horizontal flyback pulse stage HF. In the sawtooth wave generating circuit 11, a sawtooth wave like the third (b) diagram is generated and passes through the coupling capacitor C 3 .

따라서 커플링콘덴서(C1)(C3)를 통과하여 DC 성분이 제거된 푸쉬 동기신호와 톱니파는 B점에서 중첩된다.Therefore, the push sync signal and the sawtooth wave from which the DC component is removed through the coupling capacitor C 1 and C 3 overlap at the point B.

만일 수평 플라이백펄스로부터 만들어진 톱니파 파형의 위상이 느리면 제 3 도의 (C-1)와 같은 파형이 C점에 나타나고, 위상이 정상이면(C-2)와 같은 파형이 나타나며, 위상이 빠른 경우에는 (C-3)과 같은 위상이 나타난다.If the sawtooth waveform made from the horizontal flyback pulse is slow, the waveform as shown in (C-1) in FIG. 3 appears at point C. If the phase is normal, the waveform as in (C-2) appears. The phase shown in (C-3) appears.

한편, 트랜지스터(Q1)는 F점에 유기된 푸쉬동기신호가 하이레벨일때 턴-온 되므로, 푸쉬동기신호가 하이 레벨이 아닌 경우에 B점의 신호가(제 3(c) 도) C점에 나타나서 수평펄스발진기(12)측에 인가된다.On the other hand, transistor Q 1 is turned on when the push synchronous signal induced at point F is at the high level, so that the signal at point B is point C when the push synchronous signal is not at the high level (Fig. 3 (c)). Appears at and is applied to the horizontal pulse oscillator 12 side.

즉, 위상이 느린경우에는 제 3 도의 (D-1)파형이, 위상이 정상인 경우에 제 3 도의 (D-2)파형이, 위상이 빠른 경우에 제 3 도의 (D-3)파형이 저항(R1)과 콘덴서(C4)로 구성되는 정류회로에 인가된다.That is, if the phase is slow, the waveform of FIG. 3D is normal, if the phase is normal, the waveform of FIG. 3D is fast, and if the phase is fast, the waveform of FIG. It is applied to a rectifier circuit composed of (R 1 ) and a capacitor (C 4 ).

여기에서 수평 펄스발진기(12)는 그 입력신호가 마이너스 성분일때 높은 주파수를 발생시키고, 0성분일 때는 기존의 정상주파수를, 플러스성분일때는 낮은 주파수를 발생시킨다.Here, the horizontal pulse oscillator 12 generates a high frequency when the input signal is a negative component, generates an existing normal frequency when the component is zero, and a low frequency when the component is positive.

따라서 제 3(d) 도와 같은 파형에 의해서 수평 펄스 발진기(12)는 펄스주파수를 안정화시킨다.Therefore, the horizontal pulse oscillator 12 stabilizes the pulse frequency by the same waveform as the third diagram (d).

상기한 바와 같이, 본 고안은 단일의 푸쉬 동기신호로써 수평 펄스주파수를 안정화시킬 수 있으므로, 주파수 안정화회로의 부품수와 제품의 생산원가를 절감시킬 수 있는 장점을 가지고 있다.As described above, the present invention can stabilize the horizontal pulse frequency as a single push synchronization signal, which has the advantage of reducing the number of components of the frequency stabilization circuit and the production cost of the product.

Claims (1)

푸쉬동기신호단(PS)에서 입력되는 푸쉬 동기신호와 수평펄스발진기(12)에서 출력된 신호가 수평플라이백펄스단(HF)으로 궤환되어 톱니파 발생회로(11)를 거치면서 출력되는 톱니파를 중첩시켜 주므로서 수평펄스 주파수를 안정화시켜주도록 된 텔레비젼의 수평펄스 주파수 안정화회로에 있어서, 상기 푸쉬 동기신호단(PS)이 커플링콘덴서(C1)와 콘덴서(C2)및 트랜지스터(Q1)의 베이스측에 연결되고, 상기 수평플라이백펄스단(HF)이 상기 톱니파 발생회로(11)를 통해 커플링콘덴서(C3)에 연결되며, 상기 커플링콘덴서(C1)와 커플링콘덴서(C3)의 접속점에 트랜지스터(Q1)의 콜렉터가 연결되고, 상기 트랜지스터(Q1)의 콜렉터가 저항(R1)과 콘덴서(C4)로 구성된 정류회로를 통해 상기 수평펄스발진기(12)측에 연결된 것을 특징으로 하는 텔레비젼의 수평펄스 주파수 안정화회로.The push sync signal inputted from the push sync signal stage PS and the signal output from the horizontal pulse oscillator 12 are fed back to the horizontal flyback pulse stage HF to overlap the sawtooth wave output while passing through the sawtooth wave generating circuit 11. In a horizontal pulse frequency stabilization circuit of a television which is designed to stabilize a horizontal pulse frequency, the push synchronization signal terminal PS is connected to a coupling capacitor C 1 , a capacitor C 2 , and a transistor Q 1 . It is connected to the base side, the horizontal flyback pulse stage (HF) is connected to the coupling capacitor (C 3 ) through the sawtooth wave generating circuit 11, the coupling capacitor (C 1 ) and coupling capacitor (C). 3), and the collector of the transistor (Q 1) connected to the connection point of the transistor (Q 1) of the collector resistor (R 1) and a capacitor (C 4), said horizontal pulse oscillator 12 through the rectifier circuit consisting of a side A horizontal pulse of a television, characterized in that connected to Frequency stabilization circuit.
KR2019840012174U 1984-11-24 1984-11-24 Horizontal pulse frequency stabilization circuit of television KR870002271Y1 (en)

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Application Number Priority Date Filing Date Title
KR2019840012174U KR870002271Y1 (en) 1984-11-24 1984-11-24 Horizontal pulse frequency stabilization circuit of television

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Application Number Priority Date Filing Date Title
KR2019840012174U KR870002271Y1 (en) 1984-11-24 1984-11-24 Horizontal pulse frequency stabilization circuit of television

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KR860006853U KR860006853U (en) 1986-06-25
KR870002271Y1 true KR870002271Y1 (en) 1987-06-25

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KR2019840012174U KR870002271Y1 (en) 1984-11-24 1984-11-24 Horizontal pulse frequency stabilization circuit of television

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