JPS6224564U - - Google Patents
Info
- Publication number
- JPS6224564U JPS6224564U JP11684685U JP11684685U JPS6224564U JP S6224564 U JPS6224564 U JP S6224564U JP 11684685 U JP11684685 U JP 11684685U JP 11684685 U JP11684685 U JP 11684685U JP S6224564 U JPS6224564 U JP S6224564U
- Authority
- JP
- Japan
- Prior art keywords
- base
- input
- synchronization signal
- transistor
- emitter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims 1
- 230000008878 coupling Effects 0.000 claims 1
- 238000010168 coupling process Methods 0.000 claims 1
- 238000005859 coupling reaction Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
- 230000001360 synchronised effect Effects 0.000 description 1
Landscapes
- Synchronizing For Television (AREA)
Description
第１図は、この考案の同期極性判別回路の一実
施例を示す回路図、第２，３図は、それぞれ極性
の異なる外部同期信号に対する第１図に示した回
路各部の信号波形図、第４図は、従来の同期極性
判別回路を適用した外部同期入力回路の一例を示
す回路である。
１１……同期極性判別回路、Ｑ……トランジス
タ、Ｒａ，Ｒｂ……分圧抵抗。
FIG. 1 is a circuit diagram showing an embodiment of the synchronization polarity discrimination circuit of this invention, and FIGS. 2 and 3 are signal waveform diagrams of various parts of the circuit shown in FIG. FIG. 4 shows an example of an external synchronization input circuit to which a conventional synchronization polarity determination circuit is applied. 11... Synchronous polarity discrimination circuit, Q... Transistor, R a , R b ... Voltage dividing resistor.
Claims (1)
端子に接続され、この同期信号入力端子にエミツ
タが直流結合されたトランジスタと、このトラン
ジスタのベース入力の平均レベルを決めるベース
電位を与える分圧抵抗とからなり、前記エミツタ
入力が入力同期信号の極性に応じて、前記ベース
入力と一義的な大小関係をもつよう構成してなる
同期極性判別回路。 It consists of a transistor whose base is connected to a synchronization signal input terminal via a coupling capacitor and whose emitter is DC-coupled to this synchronization signal input terminal, and a voltage dividing resistor that provides a base potential that determines the average level of the base input of this transistor. , a synchronization polarity determination circuit configured such that the emitter input has a unique magnitude relationship with the base input according to the polarity of the input synchronization signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11684685U JPS6224564U (en) | 1985-07-30 | 1985-07-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11684685U JPS6224564U (en) | 1985-07-30 | 1985-07-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6224564U true JPS6224564U (en) | 1987-02-14 |
Family
ID=31001817
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11684685U Pending JPS6224564U (en) | 1985-07-30 | 1985-07-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6224564U (en) |
-
1985
- 1985-07-30 JP JP11684685U patent/JPS6224564U/ja active Pending
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