JPS58562U - Vertical oscillation circuit - Google Patents

Vertical oscillation circuit

Info

Publication number
JPS58562U
JPS58562U JP9377081U JP9377081U JPS58562U JP S58562 U JPS58562 U JP S58562U JP 9377081 U JP9377081 U JP 9377081U JP 9377081 U JP9377081 U JP 9377081U JP S58562 U JPS58562 U JP S58562U
Authority
JP
Japan
Prior art keywords
oscillation circuit
vertical oscillation
circuit
vertical
time constant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9377081U
Other languages
Japanese (ja)
Inventor
西澤 正司
Original Assignee
株式会社日立製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社日立製作所 filed Critical 株式会社日立製作所
Priority to JP9377081U priority Critical patent/JPS58562U/en
Publication of JPS58562U publication Critical patent/JPS58562U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来回路を示す図、第2図は本考案を示す図、
第3図、第4図はトランジスター15のコレクタ出力波
形を示す図、第5図はR/Sフリップフロップの入力波
形を示す図である。 1・・・・・・同期分離Tr、 、2・・・・・・水平
垂直同期発振IC,3・・・・・・垂直同期調節VR,
4・・・・・・時定数コンでンサ、5・・・・・・垂直
振幅VR,6・・曲垂直DY電流調整用抵抗、7・・・
・・・垂直DY、8・・・・・・垂直出力回路、9・・
・・・・垂直時定数抵抗、10・・曲スイッチ、11・
・・・・・垂直DY電流調整抵抗、12・・・・・・ス
イッチ。
Fig. 1 is a diagram showing a conventional circuit, Fig. 2 is a diagram showing the present invention,
3 and 4 are diagrams showing the collector output waveform of the transistor 15, and FIG. 5 is a diagram showing the input waveform of the R/S flip-flop. 1... Synchronization separation Tr, 2... Horizontal/vertical synchronization oscillation IC, 3... Vertical synchronization adjustment VR,
4...Time constant capacitor, 5...Vertical amplitude VR, 6...Resistor for vertical DY current adjustment, 7...
... Vertical DY, 8... Vertical output circuit, 9...
・・・Vertical time constant resistance, 10... Song switch, 11...
...Vertical DY current adjustment resistor, 12...Switch.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] テレビ受信機の垂直発振回路において、同期分離回路か
らの垂直同期信号と垂直発振回路の位相を検出する回路
を設け、時定数回路を通してR/Sフリップフロップを
動作させ、この出力により垂直発振回路の発振時定数を
5QHz又は60H2に自動的に切換えることを特徴と
した垂直発振回路。
In the vertical oscillation circuit of the television receiver, a circuit is provided to detect the vertical synchronization signal from the synchronization separation circuit and the phase of the vertical oscillation circuit, and the R/S flip-flop is operated through the time constant circuit, and this output is used to detect the vertical oscillation circuit. A vertical oscillation circuit characterized by automatically switching the oscillation time constant to 5QHz or 60H2.
JP9377081U 1981-06-26 1981-06-26 Vertical oscillation circuit Pending JPS58562U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9377081U JPS58562U (en) 1981-06-26 1981-06-26 Vertical oscillation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9377081U JPS58562U (en) 1981-06-26 1981-06-26 Vertical oscillation circuit

Publications (1)

Publication Number Publication Date
JPS58562U true JPS58562U (en) 1983-01-05

Family

ID=29888738

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9377081U Pending JPS58562U (en) 1981-06-26 1981-06-26 Vertical oscillation circuit

Country Status (1)

Country Link
JP (1) JPS58562U (en)

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