JPS6093338U - Signal switching circuit - Google Patents
Signal switching circuitInfo
- Publication number
- JPS6093338U JPS6093338U JP18455283U JP18455283U JPS6093338U JP S6093338 U JPS6093338 U JP S6093338U JP 18455283 U JP18455283 U JP 18455283U JP 18455283 U JP18455283 U JP 18455283U JP S6093338 U JPS6093338 U JP S6093338U
- Authority
- JP
- Japan
- Prior art keywords
- intermediate frequency
- amplifier
- signal switching
- switching circuit
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Electronic Switches (AREA)
- Superheterodyne Receivers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
゛第１区は、従来の信号切換回路の結線図、第２図はこ
の考案の実施例による信号切換回路の結線図である。
１・・・・・・中間周波増幅器、２・・・・・・マルチ
プレックス増幅器、Ｒ１−Ｒ４・・・・・・抵抗、Ｃ１
〜Ｃ３，Ｃ・・・・・・コンデンサ、Ｄ・・・・・・ダ
イオード。Section 1 is a wiring diagram of a conventional signal switching circuit, and FIG. 2 is a wiring diagram of a signal switching circuit according to an embodiment of this invention. 1...Intermediate frequency amplifier, 2...Multiplex amplifier, R1-R4...Resistor, C1
~C3, C... Capacitor, D... Diode.
Claims (1)
幅器と、この中間周波増幅器の中間周波出力を入力する
セパレーションコントロール機能をもたないマルチプレ
ックス増幅器と、このマルチプレックス増幅器と上記中
間周波増幅器との間に相互に直列な状態で挿入されたＦ
Ｍ用位相補償回路および周用ｆ特・レベル調整回路と、
このＭ用ｆ特・レベル調整回路に並列に接続され、ＦＭ
時に該回路をバイパスするダイオードとからなる信号切
換回路。An intermediate frequency amplifier having a common output terminal for AM and FM, a multiplex amplifier without a separation control function that inputs the intermediate frequency output of this intermediate frequency amplifier, and a combination of this multiplex amplifier and the above intermediate frequency amplifier. F inserted in series between
M phase compensation circuit and frequency f characteristic/level adjustment circuit,
Connected in parallel to this M f-characteristic/level adjustment circuit,
A signal switching circuit consisting of a diode that sometimes bypasses the circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18455283U JPS6093338U (en) | 1983-12-01 | 1983-12-01 | Signal switching circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18455283U JPS6093338U (en) | 1983-12-01 | 1983-12-01 | Signal switching circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6093338U true JPS6093338U (en) | 1985-06-26 |
| JPH0210687Y2 JPH0210687Y2 (en) | 1990-03-16 |
Family
ID=30399127
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18455283U Granted JPS6093338U (en) | 1983-12-01 | 1983-12-01 | Signal switching circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6093338U (en) |
-
1983
- 1983-12-01 JP JP18455283U patent/JPS6093338U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0210687Y2 (en) | 1990-03-16 |
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