JPS62164651U - - Google Patents
Info
- Publication number
- JPS62164651U JPS62164651U JP5169486U JP5169486U JPS62164651U JP S62164651 U JPS62164651 U JP S62164651U JP 5169486 U JP5169486 U JP 5169486U JP 5169486 U JP5169486 U JP 5169486U JP S62164651 U JPS62164651 U JP S62164651U
- Authority
- JP
- Japan
- Prior art keywords
- pll
- voltage
- digital signal
- controlled oscillator
- reproduced digital
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005540 biological transmission Effects 0.000 claims 1
- 230000001360 synchronised effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
- 239000013078 crystal Substances 0.000 description 1
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
Description
第1図は本考案になるPLL回路の一実施例を
示すブロツク系統図、第2図は従来のPLL回路
の一例を示すブロツク系統図である。
1…EFM信号入力端子、4,14…位相比較
器、5,15…低域フイルタ(LPF)、11,
22…アンプ、12,16…電圧制御発振器(V
CO)、13…第1のPLL、17…分周器、1
8…水晶振動子、19…発振器、20…第2のP
LL、21…システムクロツク出力端子、23…
EFM信号出力端子、Ra,Rb…抵抗。
FIG. 1 is a block system diagram showing an embodiment of the PLL circuit according to the present invention, and FIG. 2 is a block system diagram showing an example of a conventional PLL circuit. 1... EFM signal input terminal, 4, 14... Phase comparator, 5, 15... Low pass filter (LPF), 11,
22... Amplifier, 12, 16... Voltage controlled oscillator (V
CO), 13...first PLL, 17...frequency divider, 1
8... Crystal resonator, 19... Oscillator, 20... Second P
LL, 21...System clock output terminal, 23...
EFM signal output terminal, Ra, Rb...resistance.
Claims (1)
ビツトクロツク成分に同期したパルスを発生して
ラツチ回路へラツチパルスとして供給し、該ラツ
チ回路により上記再生デイジタル信号のデータを
抜き取らせる第1のPLLと、キヤツプチヤレン
ジが該第1のPLLよりも広く選定されており、
該再生デイジタル信号の伝送ビツトレートを定め
るシステムクロツクの周波数を任意に可変して発
生出力する第2のPLLと、該第2のPLL内の
電圧制御発振器の制御電圧を該第1のPLL内の
電圧制御発振器のフリーラン周波数を定めるオフ
セツト電圧として該第1のPLL内の電圧制御発
振器へ供給するオフセツト電圧供給手段とよりな
るPLL回路。 A first PLL that generates a pulse synchronized with a bit clock component of a reproduced digital signal reproduced from a recording medium and supplies it to a latch circuit as a latch pulse, and causes the latch circuit to extract data of the reproduced digital signal; is selected more widely than the first PLL,
A second PLL generates and outputs a system clock by arbitrarily varying the frequency of a system clock that determines the transmission bit rate of the reproduced digital signal, and a control voltage of a voltage controlled oscillator in the second PLL is controlled by a control voltage in the first PLL. A PLL circuit comprising offset voltage supply means for supplying an offset voltage to a voltage controlled oscillator in the first PLL as an offset voltage for determining a free run frequency of the voltage controlled oscillator.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5169486U JPS62164651U (en) | 1986-04-07 | 1986-04-07 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5169486U JPS62164651U (en) | 1986-04-07 | 1986-04-07 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62164651U true JPS62164651U (en) | 1987-10-19 |
Family
ID=30876191
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5169486U Pending JPS62164651U (en) | 1986-04-07 | 1986-04-07 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62164651U (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0398755U (en) * | 1990-01-30 | 1991-10-15 | ||
JPH0470009A (en) * | 1990-07-09 | 1992-03-05 | Murata Mfg Co Ltd | Pll oscillator |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5665530A (en) * | 1979-10-31 | 1981-06-03 | Sony Corp | Pll circuit |
JPS607647A (en) * | 1983-06-24 | 1985-01-16 | Matsushita Electric Ind Co Ltd | Pitch control device |
-
1986
- 1986-04-07 JP JP5169486U patent/JPS62164651U/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5665530A (en) * | 1979-10-31 | 1981-06-03 | Sony Corp | Pll circuit |
JPS607647A (en) * | 1983-06-24 | 1985-01-16 | Matsushita Electric Ind Co Ltd | Pitch control device |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0398755U (en) * | 1990-01-30 | 1991-10-15 | ||
JPH0470009A (en) * | 1990-07-09 | 1992-03-05 | Murata Mfg Co Ltd | Pll oscillator |
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