JPS62154646A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To eliminate voids in aluminum wirings and pinholes in a passivation film by lowering the annealing temperature of the passivation film than the heat treating temperature of the aluminum. CONSTITUTION:After a predetermined Locos oxide film, a gate oxide film, a polysilicon gate, and a source.drain diffused layer are formed and processed on a silicon substrate 1, an interlayer insulating film made of a PSG film 2 for covering them is formed, and aluminum wirings 3 are then formed. Then, an aluminum sintering is executed at 420 deg.C for 30min in N2 and H2 mixture gas atmosphere, a PSG film 4 having 0.5mum of thickness is deposited and a plasma silicon nitride film 5 having 0.5mum of thickness is sequentially deposited thereon to form a passivation film. After a wire bonding pad is opened, the film 5 is annealed at 380 deg.C in N2 and H2 mixture gas atmosphere to complete an MOS type semiconductor device.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for heat treating a passivation film of a semiconductor device.

BACKGROUND OF THE INVENTION AI alloys are commonly used as conductive layers in conventional LSI devices. Furthermore, a two-layer structure of a plasma silicon nitride film or a PSG film and a plasma silicon nitride film is often used as the passivation film.

As an example of a conventional heat treatment method for passivation film, M
The manufacturing process of an O3 type semiconductor device will be explained with reference to FIGS. 2(a) to (→. is not shown.

As shown in FIG. 1, first, an interlayer insulating film made of a PSG film 2 is formed on a silicon substrate 1 to cover circuit elements (not shown), and then an A7 wiring 3 is formed. After this, heat treatment is performed at a temperature of, for example, 420'C so that the Al wiring 3 and the diffusion layer (not shown) formed on the silicon substrate can be in good contact with each other.Next, as shown in FIG. As shown in b), as a passivation film, for example, a PSG film 4 with a film thickness of 0.6 μm is formed, and a silicon nitride film 6 with a film thickness of 0.5 μm is formed thereon by plasma CVD.
are deposited sequentially. After this, although not shown in the figure, a hole is opened in the pad area for the wire bond, and as shown in FIG. For this purpose, annealing is performed at, for example, 450''C.

At this time, voids 6 are generated in the Al wiring 3 and pinholes 7 are generated in the passivation films 4 and 6. The main reason for the occurrence of voids 6 and pinholes 7 is the
This is thought to be due to the rapid expansion of moisture and Ar gas taken into the Al film during lk sputtering during annealing at 460"C. Sintering heat treatment is performed after Al wiring is formed, but Due to the low temperature of °C, moisture and A
This is because the r gas is not sufficiently removed from the Al wiring.

Problems to be Solved by the Invention When voids occur in the M wiring, the cross-sectional area of the M wiring in that area becomes smaller, which tends to cause problems such as electromigration silane, and pinholes in the passivation film cause Al corrosion, etc. It is obvious that this will cause reliability problems.

Means for Solving the Problems In order to solve the above-mentioned problems, the method for manufacturing a semiconductor device of the present invention includes a step of forming a conductive layer on a semiconductor substrate directly or via an insulating layer, and heat-treating the conductive layer. a step of applying;
forming a passivation film on the conductive layer;
The method is characterized in that the passivation film is annealed at a temperature lower than the temperature of the heat treatment.

Function According to the present invention, since the annealing temperature of the passivation film is higher than the M heat treatment temperature, moisture, Ar gas, etc. that were not released even at a higher temperature during the Al' heat treatment are annealed at a lower temperature. It is not released from the M wiring during processing. That is, the reliability problem is solved without generating voids in the Al wiring or pinholes in the passivation film.

EXAMPLE Hereinafter, an example in which the present invention is applied to the manufacture of an MO8 type semiconductor device will be explained using cross-sectional views showing the manufacturing process in FIGS. shows only the A/wiring and passivation film, and does not show the transistor region.

As shown in Fig. 1 (Fig. 2 is formed between the eyebrows, and then the M wiring 3 is formed.After this, the N27/H
2. Perform Al sintering at 420°C for 230 minutes in a mixed gas atmosphere. Next, as shown in FIG. 1(b), the film thickness is 0.
A 6 μm thick PSG film 4 and a 0.6 μm thick plasma silicon nitride film 5 are sequentially deposited thereon to form a passivation film.

Thereafter, although not shown in the figure, after opening a hole in the pad portion for wire bonding, the plasma silicon nitride film 5 was annealed for 3ao' in an N2/H2 mixed gas atmosphere as shown in FIG. The MO8 type semiconductor device is completed by carrying out the process at a temperature of c.

In this example, the final passivation film annealing temperature is lower than the Al heat treatment temperature.

Therefore, no gas was released from the Al wiring during the final annealing, and no voids in the Al wiring or pinholes in the passivation film were generated. Furthermore, it was confirmed that annealing at 380° C. causes no practical problems in reducing etching damage when opening holes in the pad portion and reducing hydrogen in the plasma silicon nitride film.

Note that in this example, the Al heat treatment temperature was 420°C, and the final passivation film annealing temperature was 380°C, but in other experiments, the final annealing temperature was 20 to 100°C higher than the M sinter temperature. It was confirmed that a similar effect can be obtained at low temperatures.

Further, similar results were obtained when the passivation film was composed only of a plasma silicon nitride film.

As described in detail, according to the present invention, a semiconductor device with excellent reliability can be obtained because voids are not generated in the Al wiring and pinholes are not generated in the passivation film.

[Brief explanation of drawings]

FIGS. 1(a) to (C) are cross-sectional views showing the manufacturing process of an embodiment of the present invention, and FIGS. 2(a) to (C) are cross-sectional views showing the manufacturing process of a conventional example. 1. ...Silicon substrate, 2,4...PS
G film, 3...Al wiring, 6...Plasma silicon nitride film, 6...Void, 7...
Pinhole. Name of agent: Patent attorney Toshio Nakao and one other person
--Silicon group and

Claims (2)

[Claims] (1) A step of forming a conductive layer directly or via an insulating layer on a semiconductor substrate, a step of performing heat treatment on the conductive layer, a step of forming a passivation film on the conductive layer, and a step of A method of manufacturing a semiconductor device, comprising annealing the passivation film at a low temperature. (2) The method of manufacturing a semiconductor device according to claim 1, wherein the temperature difference between the annealing temperature of the passivation film and the heat treatment temperature of the conductive layer is within the range of 20°C to 100°C.