JPS62152450U - - Google Patents
Info
- Publication number
- JPS62152450U JPS62152450U JP4103886U JP4103886U JPS62152450U JP S62152450 U JPS62152450 U JP S62152450U JP 4103886 U JP4103886 U JP 4103886U JP 4103886 U JP4103886 U JP 4103886U JP S62152450 U JPS62152450 U JP S62152450U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- microwave integrated
- dielectric substrate
- heat dissipation
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 4
- 230000017525 heat dissipation Effects 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
- 239000000919 ceramic Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Non-Reversible Transmitting Devices (AREA)
Description
第１図は本考案の１実施例のＦＥＴ斜視図、第
２図は本考案による帰還型発振器の主要回路パタ
ーン図、第３図はＦＥＴの斜視図、第４図は従来
の帰還型発振器の主要回路パターン図である。
図において、１は接地放熱基板、２は固定孔、
３はゲート電極リード、４はドレイン電極リード
、７はセラミツク基板、８は金細線、１０，１１
はＦＥＴ、２０は整合スタブ、３０は誘電体共振
器、４０は電力分配器、５０，５１，５２，５３
，５４，６０はＭＩＣ線路である。
Fig. 1 is a perspective view of an FET according to an embodiment of the present invention, Fig. 2 is a main circuit pattern diagram of a feedback oscillator according to the invention, Fig. 3 is a perspective view of an FET, and Fig. 4 is a diagram of a conventional feedback oscillator. It is a main circuit pattern diagram. In the figure, 1 is a grounded heat dissipation board, 2 is a fixing hole,
3 is a gate electrode lead, 4 is a drain electrode lead, 7 is a ceramic substrate, 8 is a thin gold wire, 10, 11
is a FET, 20 is a matching stub, 30 is a dielectric resonator, 40 is a power divider, 50, 51, 52, 53
, 54, and 60 are MIC lines.
Claims (1)
基板を搭載し、該誘電体基板上にマイクロ波集積
回路を設けたことを特徴とするマイクロ波集積回
路装置。 A microwave integrated circuit device characterized in that a dielectric substrate is mounted on a grounded heat dissipation substrate of a high power semiconductor element, and a microwave integrated circuit is provided on the dielectric substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4103886U JPS62152450U (en) | 1986-03-20 | 1986-03-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4103886U JPS62152450U (en) | 1986-03-20 | 1986-03-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62152450U true JPS62152450U (en) | 1987-09-28 |
Family
ID=30855665
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4103886U Pending JPS62152450U (en) | 1986-03-20 | 1986-03-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62152450U (en) |
-
1986
- 1986-03-20 JP JP4103886U patent/JPS62152450U/ja active Pending