JPS62152507U - - Google Patents

Info

Publication number
JPS62152507U
JPS62152507U JP4032486U JP4032486U JPS62152507U JP S62152507 U JPS62152507 U JP S62152507U JP 4032486 U JP4032486 U JP 4032486U JP 4032486 U JP4032486 U JP 4032486U JP S62152507 U JPS62152507 U JP S62152507U
Authority
JP
Japan
Prior art keywords
integrated circuit
predetermined position
utility
registration request
scope
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4032486U
Other languages
Japanese (ja)
Other versions
JPH0328563Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986040324U priority Critical patent/JPH0328563Y2/ja
Publication of JPS62152507U publication Critical patent/JPS62152507U/ja
Application granted granted Critical
Publication of JPH0328563Y2 publication Critical patent/JPH0328563Y2/ja
Expired legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案によるMICの上面図を、第2
図は本考案によるMICの断面図を、第3図は第
1の従来例の構成を、第4図は第2の従来例の構
成を示す。 図中、1は誘電体共振器を、2はFETを、3
,4,9はマイクロストリツプラインを、5はス
ペーサを、6は導体片を、7は誘電体基板を、8
は接地導体を表わす。
Figure 1 shows a top view of the MIC according to the present invention, and Figure 2 shows a top view of the MIC according to the present invention.
The figure shows a sectional view of the MIC according to the present invention, FIG. 3 shows the configuration of a first conventional example, and FIG. 4 shows the configuration of a second conventional example. In the figure, 1 is a dielectric resonator, 2 is an FET, and 3 is a dielectric resonator.
, 4, 9 are microstrip lines, 5 is a spacer, 6 is a conductor piece, 7 is a dielectric substrate, 8
represents a ground conductor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 接地導体上に誘電体基板を介し設けられたスト
リツプラインの所定位置上面に導体片を設けて誘
電体共振器と磁界結合させたことを特徴とするマ
イクロ波集積回路。
1. A microwave integrated circuit characterized in that a conductor piece is provided at a predetermined position on the upper surface of a stripline provided on a ground conductor via a dielectric substrate, and is magnetically coupled to a dielectric resonator.
JP1986040324U 1986-03-19 1986-03-19 Expired JPH0328563Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986040324U JPH0328563Y2 (en) 1986-03-19 1986-03-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986040324U JPH0328563Y2 (en) 1986-03-19 1986-03-19

Publications (2)

Publication Number Publication Date
JPS62152507U true JPS62152507U (en) 1987-09-28
JPH0328563Y2 JPH0328563Y2 (en) 1991-06-19

Family

ID=30854319

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986040324U Expired JPH0328563Y2 (en) 1986-03-19 1986-03-19

Country Status (1)

Country Link
JP (1) JPH0328563Y2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6237408U (en) * 1985-08-26 1987-03-05

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4521773A (en) * 1981-08-28 1985-06-04 Xerox Corporation Imaging array

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6237408U (en) * 1985-08-26 1987-03-05

Also Published As

Publication number Publication date
JPH0328563Y2 (en) 1991-06-19

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