JPS62151222U - - Google Patents
Info
- Publication number
- JPS62151222U JPS62151222U JP3952586U JP3952586U JPS62151222U JP S62151222 U JPS62151222 U JP S62151222U JP 3952586 U JP3952586 U JP 3952586U JP 3952586 U JP3952586 U JP 3952586U JP S62151222 U JPS62151222 U JP S62151222U
- Authority
- JP
- Japan
- Prior art keywords
- amplifier
- resistor
- power supply
- capacitor connected
- fet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 9
- 239000000758 substrate Substances 0.000 claims description 2
- 230000005669 field effect Effects 0.000 claims 1
- 239000004020 conductor Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Microwave Amplifiers (AREA)
Description
第１図はこの考案によるＦＥＴアンプのバイア
ス供給回路の一実施例の構造図、第２図は第１図
に示したバイアス供給回路の断面図、第３図は従
来のバイアス供給回路の構造図、第４図は一般的
なＦＥＴアンプの構成図である。
図中、４は高誘電体基板、５は第１のコンデン
サの上部電極用導体、６は抵抗体膜、７は第２の
コンデンサの上部電極用導体、１８は全体として
バイアス供給回路、９は第１のコンデンサ、１０
は抵抗器、１１は第２のコンデンサを示す。なお
、図中同一あるいは相当部分には同一符号を付し
てある。
Fig. 1 is a structural diagram of one embodiment of the bias supply circuit of the FET amplifier according to this invention, Fig. 2 is a sectional view of the bias supply circuit shown in Fig. 1, and Fig. 3 is a structural diagram of a conventional bias supply circuit. , FIG. 4 is a block diagram of a general FET amplifier. In the figure, 4 is a high dielectric substrate, 5 is a conductor for the upper electrode of the first capacitor, 6 is a resistor film, 7 is a conductor for the upper electrode of the second capacitor, 18 is the entire bias supply circuit, and 9 is a conductor for the upper electrode of the second capacitor. first capacitor, 10
indicates a resistor, and 11 indicates a second capacitor. Note that the same or corresponding parts in the figures are given the same reference numerals.
Claims (1)
器と、この増幅器に所定のバイアスを印加するＤ
Ｃバイアス電源と、前記増幅器と電源との間に直
列に接続される抵抗器と、この抵抗器の増幅器側
に並列に接続される第１のコンデンサと、前記抵
抗器のＤＣバイアス電源側に並列に接続される第
２のコンデンサとから構成されるＦＥＴ増幅器に
おいて、前記第１および第２のコンデンサと抵抗
器を高誘電体基板上に一体化したことを特徴とす
るＦＥＴ増幅装置。 An amplifier using a FET (field effect transistor) and a D that applies a predetermined bias to this amplifier.
a C bias power supply, a resistor connected in series between the amplifier and the power supply, a first capacitor connected in parallel to the amplifier side of the resistor, and a first capacitor connected in parallel to the DC bias power supply side of the resistor. and a second capacitor connected to the FET amplifier, characterized in that the first and second capacitors and the resistor are integrated on a high dielectric substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3952586U JPS62151222U (en) | 1986-03-18 | 1986-03-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3952586U JPS62151222U (en) | 1986-03-18 | 1986-03-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62151222U true JPS62151222U (en) | 1987-09-25 |
Family
ID=30852772
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3952586U Pending JPS62151222U (en) | 1986-03-18 | 1986-03-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62151222U (en) |
-
1986
- 1986-03-18 JP JP3952586U patent/JPS62151222U/ja active Pending
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