JPS6211279A - Field effect transistor - Google Patents

Abstract

PURPOSE:To obtain an FET with low noise and high operation speed by a method wherein an AlGaAs layer, which is an electron supply source of the hetero-junction type FET, is composed of a superlattice structure to realize high electron concentration. CONSTITUTION:A high-purity and non-doped GaAs layer 12 and an AlGaAs superlattice layer 13 are laminated on a semi-insulating GaAs substrate 11 and a source electrode 14a, a gate electrode 14b and a drain electrode 14c are provided. The superlattice layer is composed of repetitive structure of a non-doped Al0.4Ga0.8As layer 15, a non-doped Al0.2Ga0.8As layer 16 and an N-type Al0.2Ga0.8As layer 17 whose thicknesses are about five atoms thick respectively. The N-type AlGaAs layer is an electron supply source and if the layer can supply electrons with higher concentration, the characteristics of the element can be better. The Al mixed crystal ratio (x) is selected to be less than 0.2 in the layer 17 doped with donors and, in the layer 15, x 0.4 to increase the actual mixed crystal ratio of the superlattice and the layer 15 is not doped and, in the layer 16, x=0.2 to make the layer 16 serve as a buffer layer for protecting the donors from the influence of the layer 15. With this constitution, most of the donor electrons added to the layer 17 are activated in the conduction band and the electron concentration of about 10<19>cm<-3> can be obtained for the whole layer 13 so that an FET with low noise and high operation speed can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a field effect transistor that can be used in high-speed digital ICs, low-noise amplifiers in the GH2 band, and the like.

BACKGROUND OF THE INVENTION In recent years, field effect transistors have entered a new phase due to advances in heterostructure fabrication technology.

In particular, GaAs and A-vertical GaAs have a small difference in thermal expansion coefficient and lattice constant, so a good heterojunction can be realized. Field-effect transistors that utilize this heterojunction are attracting attention because they can achieve high-speed operation.

Such a conventional heterostructure field effect transistor will be explained with reference to FIG. FIG. 3 is a cross-sectional view of a conventional heterojunction field effect transistor, in which 1 is a semi-insulating GaAs substrate, 2 is a high purity undoped GaAs layer grown thereon, and 3 is an N Type AJL x
G ax −X A s layer (X″; 0.3), 4 a
is a source electrode, 4b is a gate electrode, and 4c is a drain electrode.

The electrons emitted from N-type A oyster turtle a, -2AsJ13 are
High-purity undoped GaAs layer 2 and N-type AuxGa
1-2 High purity undoped Ga A at the interface with As layer 3
It accumulates on the 2nd side of the 8th layer. High purity undoped Ga As
Since the layer 2 has high purity and contains few impurities, the electrons collide with impurities to a small degree and have a high mobility.

Problems to be Solved by the Invention However, in the above conventional configuration, N-type AlxGax
When AsABO39J's mixed crystal ratio Even if a large amount of donor is doped to increase the electron density, the electron density cannot be increased and the device cannot operate as fast as expected.

The present invention solves the above-mentioned conventional problems, and aims to provide a field effect transistor that can increase electron concentration and realize high-speed operation with low noise.

Means for Solving the Problems In order to solve the above problems, the field effect transistor of the present invention includes a semi-insulating GaAs substrate and a GaAs layer formed on the semi-insulating GaAs substrate. layer, an undoped AAGaAs layer formed on this GaAs layer, and an impurity-doped AuxGaAs layer.
The structure includes a z −X As layer (X≦0.2) and a superlattice layer.

Effect According to the above configuration, the donor exists only in the AM (Ga1-xAs) layer where the mixed crystal ratio The phenomenon of no longer being excited occurs, and the electron concentration can be increased.

EXAMPLE Hereinafter, an example of the present invention will be described based on FIGS. 1 and 2.

FIG. 1 is a cross-sectional view of a field effect transistor according to an embodiment of the present invention, in which 11 is a semi-insulating GaAs substrate;
2 is a high purity undoped Ga As layer, and 13 is an undoped AM layer. 4Ga0. , As layer and N-type Au, ,Ga,
,, superlattice layer with As layer, 14a is a source electrode, 14b
is the gate electrode.

14c is a drain electrode, and the parts other than the superlattice layer 13 are the third
The structure is similar to that of the conventional field effect transistor shown in the figure. The superlattice layer 13 is made of undoped Ano, 4 Gaa, s, each layer having a thickness of about 5 atoms, as shown in detail in FIG.
As layer 15 and undoped An. 2Gao,.

A superlattice structure is formed by repeating the Ass layer 6 and the N-type Auo, zGao, and ++As layers 17.

In a heterojunction field effect transistor, N-type AA
Since the GaAs layer plays the role of an electron supply source, the higher the concentration of electrons that can be supplied, the better the characteristics of the device will be. In this example, a layer 17 doped with a donor serving as an electron supply source is used.
The mixed crystal ratio X of AM is 0.2 or less, and in order to increase the effective mixed crystal ratio of the layer 15,
The structure is such that no impurities are doped. x=0.
The undoped layer 16 of 2 is a buffer layer, and the donor is in layer 1.
This is a layer to avoid being affected by 5.

In such a configuration, N-type Au. 2GaI, 11As
Almost all of the donor electrons doped in the layer 17 are emitted and excited to the conduction band, so that when looking at the superlattice layer 13 as a whole, an electron concentration of about 10"cm" is obtained.

Effects of the Invention As described above, according to the present invention, AMG a A s which is an electron supply source of a heterojunction field effect transistor
Since the layer has a superlattice structure, it is possible to achieve an electron concentration that is approximately one order of magnitude higher than that of the conventional method, and therefore, it is possible to obtain good characteristics for use in high-speed digital ICs and low-noise amplifiers in the GH2 band.

[Brief explanation of drawings]

FIG. 1 is a sectional view of a field effect transistor according to an embodiment of the present invention, FIG. 2 is an enlarged sectional view of a superlattice layer in the same field effect transistor, and FIG. 3 is a sectional view of a conventional heterojunction field effect transistor. It is a diagram. DESCRIPTION OF SYMBOLS 11... Semi-insulating GaAs substrate, 12... High purity undoped GaAs layer, 13... Superlattice layer, 15
...Undoped Aio4Gao, 6As layer, 17-N
Type Ano20ao, sAs layer agent Morimoto
YoshihiroFigure 1Figure 2Figure 3rl- Laterality 6raAsTa&. /2-114-Hean r-Funashi As layer 13--Super vermilion

Claims (1)

[Claims] 1. A semi-insulating GaAs substrate, a GaAs layer formed on this semi-insulating GaAs substrate, and an undoped Al_xGa_1_ formed on this GaAs layer.
−_xAs layer and impurity-doped Al_xGa_1_
−_xAs layer (However, Al_xGa doped with impurities)
_1_-_x x of the As layer is 0.2 or less) and a superlattice layer.