JPS6210534U - - Google Patents

Info

Publication number
JPS6210534U
JPS6210534U JP10278185U JP10278185U JPS6210534U JP S6210534 U JPS6210534 U JP S6210534U JP 10278185 U JP10278185 U JP 10278185U JP 10278185 U JP10278185 U JP 10278185U JP S6210534 U JPS6210534 U JP S6210534U
Authority
JP
Japan
Prior art keywords
circuit
transfer gate
output
input signals
select
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10278185U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP10278185U priority Critical patent/JPS6210534U/ja
Publication of JPS6210534U publication Critical patent/JPS6210534U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Logic Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案による一実施例を示す回路図、
第2図は従来のNMOSを用いた高速型イクスク
ルーシブノア回路図である。 DA2,DB2:入力信号、C2:出力信号、
P3,P4:トランスフアゲート、P5,P6,
D2:NOR回路、P7:負荷トランジスタ。
FIG. 1 is a circuit diagram showing an embodiment of the present invention;
FIG. 2 is a diagram of a high-speed exclusive NOR circuit using a conventional NMOS. DA2, DB2: input signal, C2: output signal,
P3, P4: transfer gate, P5, P6,
D2: NOR circuit, P7: load transistor.

Claims (1)

【実用新案登録請求の範囲】 複数の各入力信号についてその通過を制御する
トランスフアゲートと、 上記複数の入力信号が与えられたノア回路と、 該ノア回路の出力に基いて上記トランスフアゲ
ートの出力を選択するエンハンスメント型FET
とを備えてなることを特徴とするイクスクルーシ
ブノア回路。
[Claims for Utility Model Registration] A transfer gate that controls passage of each of a plurality of input signals, a NOR circuit to which the plurality of input signals are applied, and an output of the transfer gate based on the output of the NOR circuit. Enhancement type FET to select
An exclusive Noah circuit characterized by comprising:
JP10278185U 1985-07-04 1985-07-04 Pending JPS6210534U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10278185U JPS6210534U (en) 1985-07-04 1985-07-04

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10278185U JPS6210534U (en) 1985-07-04 1985-07-04

Publications (1)

Publication Number Publication Date
JPS6210534U true JPS6210534U (en) 1987-01-22

Family

ID=30974735

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10278185U Pending JPS6210534U (en) 1985-07-04 1985-07-04

Country Status (1)

Country Link
JP (1) JPS6210534U (en)

Similar Documents

Publication Publication Date Title
JPS6210534U (en)
JPS5996937U (en) Schmitt trigger circuit
JPS62203529U (en)
JPS62159024U (en)
JPS6155296U (en)
JPH0255739U (en)
JPH0348924U (en)
JPH0346238U (en)
JPH0223119U (en)
JPH0157823U (en)
JPS647468U (en)
JPH01160714U (en)
JPS58166294U (en) Through current prevention circuit
JPS6295321U (en)
JPS6312935U (en)
JPH03113443U (en)
JPS61176830U (en)
JPH0472723U (en)
JPS63185314U (en)
JPS62139101U (en)
JPS604041U (en) Output circuit
JPS5698793A (en) Ratioless 22phase shift register bit
JPS5929817U (en) AGC circuit
JPS62105636U (en)
JPS63147036U (en)