JPS62104174A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To implement homogeneity and stabilization of contact resistance, to prevent electromigration and to stabilize silicide, by forming a specified silicide layer on the main surface side of a semiconductor substrate, and forming a nitride layer at least on the surface of the silicide layer. CONSTITUTION:Nitride layers 20-22 of titanium silicide are formed on titanium silicide layers 11-13. Thus, electrodes 17 and 18 and silicide layers 6 and 7 are not directly contacted, reaction between the electrodes and the silicide at the time of forming the electrodes and the like is prevented and the contact resistance between both parts is not substantially changed. At this time, the electric resistance of the nitride of the titanium silicide is sufficiently low. Therefore, it is not required to increase the contact resistance. The nitride layer prevents the oxidation of the basis titanium silicide and functions as a barrier for electromigration. Therefore, the reliability of the semiconductor device can be improved. The layers 21 and 22 work as an etching mask against the basis silicon when contact holes 15 and 16 are formed by etching.

Description

DETAILED DESCRIPTION OF THE INVENTION A. Field of Industrial Application The present invention relates to a semiconductor device and a method for manufacturing the same.

However, prior art semiconductor devices, such as dynamic RAM (rand
Self-aligned silicide is one method for forming a high-melting point metal silicide layer on the surface of a polysilicon gate or diffusion layer in applications such as omaaccess memory, etc., and is expected to achieve higher speed and higher integration. An example will be explained with reference to FIG. 5 along the manufacturing process.

First, as shown in FIG. 5A, LOGOS (Local Oxidati
A field oxide film 2 is formed into a predetermined pattern by an on-of-Silicon method, and a P-type semiconductor region 3 serving as a channel stopper is formed immediately below the field oxide film 2. and,
After growing the gate oxide film 4, CVD (Chem
Polysilicon is deposited over the entire surface by a ical vapor deposition method, and then this polysilicon layer is processed by a photoetching method to form a polysilicon gate 5.

Next, as shown in FIG. 5B, the oxide film deposited over the entire surface by the CVD method is subjected to RIE (Reactive Io).
nEtching) and 5i0 on the side of gate 5.
Two spacers 8 and 9 are formed to have a predetermined width.

Furthermore, using the polysilicon gate 5 and spacers 8 and 9 as masks, phosphorus ions are implanted to form N+I semiconductor regions 6 and 7 that will become source and drain regions on both sides of the gate 5.
is formed into a self-line.

Next, as shown in FIG. 5C, a high melting point metal (for example, titanium) 10 is deposited on the entire surface by sputtering.

Next, as shown in FIG. 5D, heat treatment is performed in an electric furnace or a lamp annealer such as a halogen lamp under normal pressure (near 760 Torr) in the presence of an inert gas, so that the high melting point metal 10 and the exposed silicon layer (i.e., For example, titanium silicide layers 11, 12 and 13 are formed on the surface of the silicon layer by an alloying reaction with the gate 5, source and drain regions 6 or 7).
grow selectively.

Next, as shown in FIG. 5E, unreacted titanium with silicon is removed by etching with ammonia solution, etc., and the silicide layer 1 is removed.
1. Expose 12 and 13.

This silicide layer also has a stable composition (TiSi2)
Heat treatment is performed at 700°C or higher to achieve this.

Next, as shown in FIG. 5F, contact holes 15 are formed in predetermined locations (over the source and drain regions in the drawing) of the insulating film (for example, phosphosilicate glass film) 14 adhered to the entire surface.
．． The electrodes 17 and 18 and various wirings are formed by photoetching the aluminum layer 16, which has been deposited over the entire surface by sputtering, and then processing the aluminum layer 16 by photoetching.

A semiconductor device obtained by the manufacturing process as described above [here, MOS FET (Metal Oxide
Sea+1conductor Field Effe
As a result of various studies conducted by the present inventor regarding the ct Transistor), the following problems were discovered.

That is, first, of the titanium silicide layer, especially AN or A
In the titanium silicide layers 12 and 13 that are in contact with the electrodes 17 and 18 made of 1-alloy, etc., titanium silicide reacts with Al to form a film with a new composition at the interface, which changes the contact resistance between the two, and the semiconductor The reliability of the element deteriorates.

More importantly, because the titanium silicide and Al are in contact, electromigration of Al2 (deformation or deterioration of the electrode or wiring due to the movement of electrons in Al2) is likely to occur. In addition, titanium silicide inevitably undergoes some oxidation during its formation.
For this reason, the contact resistance with the wiring material changes or becomes thicker, but this also promotes deterioration of the reliability of the element.

These defects significantly impair the features of the silicide layer, but the reality is that no effective countermeasure has been found to date.

C.1 Object of the Invention An object of the present invention is to provide a semiconductor device and a method for manufacturing the same that equalizes and stabilizes the contact temperature, prevents electromigration, and stabilizes silicide.

21. The present invention relates to a semiconductor device in which a predetermined silicide layer is formed on one main surface side of a semiconductor substrate, and a nitride layer is formed on at least the surface of this silicide layer.

The present invention also provides a method for manufacturing the semiconductor device, including the steps of: forming a predetermined silicon layer on one main surface side of a semiconductor substrate; depositing a metal on the silicon layer;
A semiconductor comprising the steps of forming a silicide layer made of the metal and silicon in the silicon layer and simultaneously forming a nitride layer on at least the surface of the silicide layer by heat treatment in a nitrogen atmosphere or an atmosphere containing nitrogen. A method of manufacturing the device is also provided.

E. EXAMPLE Hereinafter, an example of the present invention will be described in detail with reference to FIGS. 1 to 4.

1 and 2 show a semiconductor device according to this embodiment, for example a MOSFET for dynamic RAM. This MOS transistor has common parts with the transistor shown in FIG. 5F, but the common parts are given the same reference numerals and the explanation thereof will be omitted.

The noteworthy structure in this MO3) transistor is silicide (for example, titanium silicide) l'1i11.1
The surface of 2.13 has been nitrided and converted into a nitride layer 20.21.22 by the method described below.

These nitride layers are shown shaded in FIG.

By forming such a nitride layer of titanium silicide on the surface of the titanium silicide layer, especially Al or Al
The alloy (or refractory metal) electrodes 17, 18 and the silicide layers 6 and 7 do not come into direct contact, but the nitride layers 21, 22 are interposed between them. As a result, reaction between Af and silicide on the electrode side is prevented during electrode formation, and the contact resistance between the two does not substantially change. in this case,
The electrical resistance of titanium silicide nitride is 13 to 16 μΩ.
- (b) and are sufficiently low, so the above-mentioned contact resistance does not increase. The nitride layer also has the effect of preventing oxidation of the underlying titanium silicide, which also contributes to the improvement in the contact resistance.

In addition, the nitride layers 21, 22 (and 20) have a property that is less likely to cause electromigration than 80, so they can effectively prevent the electromigration of AI that tends to occur between titanium silicide and AI. It can be prevented. In this sense, the nitride layer also functions as an electromigration barrier.

In this way, the nitride layer 21.22 (and even 20) is combined with its upper layer (particularly the AI main electrode and the titanium silicide layer 12.1).
3 (and further 11), and acts as an etching mask for the underlying silicon when forming semiconductor device elements 15 and 16 by etching.

In the above MOS FET, the total thickness of the polysilicon gate may be 4500 mm, and the thickness of the titanium silicide layer including the surface nitride layer may be 1200 mm.

Next, a method for manufacturing a semiconductor device according to this embodiment will be explained with reference to FIG.

The steps shown in FIGS. 3A to 3C are almost the same as the steps shown in FIGS. 5A to 5C, so the explanation thereof will be omitted. For example, the thickness will increase by about 1,200 people.

In the next step shown in FIG. 3D, under reduced pressure (for example, l112
Torr) in an atmosphere containing N2 or N2, and heated to, for example, 550 to 600[deg.] C. in an electric furnace or a lamp annealer such as a halogen lamp. As a result, titanium silicide layers 11.
At the same time that 12 and 13 are formed, the titanium silicide nitride layers 20 and 21 made of N2 are formed on their surfaces.
A nitriding reaction occurs in the surface layer portions where 2 and 22 are formed, respectively, due to N2 in the atmosphere. This nitridation reaction controls the diffusion of the underlying silicon to the surface and also occurs inside the silicide layer. fl g 7e'/The silicide layers 11, 12 and 13 having a nitride layer on the surface may be formed to a thickness of about 1200 mm including the nitride layer (however, the thickness of the nitride layer is about 1000 mm). Next, as shown in FIG. 3E, the unreacted silicon is removed by etching.
1.12 and 13 with its nitride layer 20.21 and 22
are selectively left in approximately the same pattern.

Next, heat treatment is performed at 700° C. or higher in an atmosphere similar to that used in the step of FIG. 3D. As a result, the nitride layers 20, 21 and 22 are sufficiently nitrided by the nitrogen atmosphere, and the underlying silicide layers 11, 12 and 13 change to a stable composition (TiSiz).

Next, as shown in FIG. 3F, an insulating film 14 is deposited on the entire surface, and after contact holes 15 and 16 are formed, electrodes 17 and 18 such as A1 are provided (see FIG. 1).

By the process described above, a silicide layer having a surface nitride layer can be formed on the surface of the silicon layer.

In the silicidation reaction shown in FIG. 3D, the nitriding reaction on the silicide surface is advantageous because it prevents oxidation of the silicide. For this purpose, it is preferable to reduce the pressure in the reaction vessel in advance as described above.

Furthermore, the heat treatment for stabilizing the silicide described in Figure 3E improves the interface with the underlying silicon, making the silicide strong and preventing film peeling. Although it depends on the structure, such a situation does not occur at all in the above stabilization process according to this example.

FIG. 4 shows a cross section of the device at a different location from that shown in FIG.
A contact hole 23 is formed in i14, and an electrode 24 such as A1 is provided therein.

In the polysilicon gate 5, the signal transmission speed is improved due to the presence of the silicide layer 11, and the contact resistance with the electrode 24 is made uniform and stabilized by the nitride Ff20, and there is no film peeling. It is particularly effective when used as a line.

Although the present invention has been illustrated above, the above-mentioned example can be further modified based on the technical idea of the present invention.

For example, the nitride layer described above may be provided on the surface of the silicide, but preferably extends into the interior of the silicide as described above. In addition to the above-mentioned titanium, other high melting point metals such as tungsten and tantalum can be used as the metal for silicidation. The electrode or wiring material on the silicide is not limited to Al, but may also be Aj? It may be made of an A1 alloy such as -3i, a high melting point metal such as tungsten, or the like.

Further, although the above example relates to a stacked structure of silicide and silicon, the present invention is not limited thereto, and can also be applied, for example, to the case where a nitride layer is formed on the surface of a gate made of only silicide. be. In addition, in the above-mentioned silicidation reaction accompanied by nitridation, other nitrogen-containing atmospheres such as NH
3 can also be used. In addition to the above-mentioned elements, the present invention can also be applied to, for example, ROM (read only memory).
), etc., and the application location may be any location where a silicide layer is formed.

1. Effects of the Invention As described above, the present invention forms a nitride layer on at least the surface of the silicide layer, thereby preventing interaction between the electrode or wiring material deposited thereon and the silicide. However, it is possible to achieve uniformity or stabilization of the contact resistance % between the two. Moreover, not only can electromigration be prevented by the nitride layer, but also the nitride layer can prevent oxidation of silicide.

[Brief explanation of drawings]

1 to 4 show examples of the present invention. FIG. 1 is a cross-sectional view of a semiconductor element, and FIG. 2 is a plan view of FIG. 1 (however, the insulating layer on the front side is not shown). (Omitted), Figures 3A, 3B, 3C, 3D, 3E, and 3F are cross-sectional views showing the manufacturing method of the semiconductor device in order of process, and Figure 4 shows other parts of the semiconductor device. FIG. 5A, 5B, 5C, 5D, 5E, and 5F are cross-sectional views showing a conventional semiconductor device manufacturing method in the order of steps. In addition, in the symbols shown in the drawings, 5......Polysilicon gate 6.7...
...N1 semiconductor region (diffusion layer) 8.9...
・・・・・・Spacer 10・・・・・・Titanium 11.12.13・・・・・・Titanium silicide layer 15.16.23・・・・・・Contact hole 17.18.24... Electrode 2 such as A1
0.21.22...Nitride layer.

Claims (1)

[Scope of Claims] 1. A semiconductor device in which a predetermined silicide layer is formed on one main surface side of a semiconductor substrate, and a nitride layer is formed on at least the surface of this silicide layer. 2. Step of forming a predetermined silicon layer on one main surface side of the semiconductor substrate; Step of depositing metal on this silicon layer; and Heat treatment in a nitrogen atmosphere or an atmosphere containing nitrogen to remove the silicon layer. A method for manufacturing a semiconductor device, comprising the step of forming a silicide layer made of the metal and silicon and simultaneously forming a nitride layer on at least a surface of the silicide layer.