JPH02216848A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To reduce substrate leakage currents and parasitic resistance accompanying crystal defects by providing a field shield electrode through a first insulating film between it and a semiconductor substrate as a field shield part for isolation between element, such that this is covered with second and third insulating films; and then forming a metallic silicide film in a self-alignment manner on an impurity-doped region to become source and drain regions. CONSTITUTION:A field shield electrode 9 is formed through an insulating film 8 (first insulating film) at a field shield part for isolation between elements. This is covered with an insulating film 10 (second insulating film) and a field shield side wall insulating film 11 (third insulating film). Accordingly, by applying bias voltage to this field shield electrode 9 in advance, interelement isolating action can be achieved as expected. Moreover, a metallic silicide film 7 is formed in a self-alignment manner on each impurity-doped region 6 to become source and drain regions. Hereby, substrate leakage currents accompanying crystal defects can be controlled favorably according to the structure in the field shield part, and also parasitic resistance can be reduced efficiently.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly, to an improvement in an isolation structure between elements in a semiconductor device and a method for forming the same.

(Prior Art) FIG. 3 shows a schematic configuration of a conventional semiconductor device having this type of element isolation structure.

In other words, in the conventional configuration shown in FIG. 3, reference numeral 21 is a silicon semiconductor substrate, and 22, 23 and 24 are gate insulators as a gate section which are sequentially laminated on selected portions on this silicon semiconductor substrate 2I. A film, a gate electrode, and an insulating film are shown respectively, and 25 is a gate sidewall insulating film formed on the side wall surface of this gate portion.

Further, 26 is an impurity-doped region on the main surface of the silicon semiconductor substrate 21, which is selectively diffused so as to sandwich the gate portion, and which becomes the source region and drain region of the transistor. A metal silicide film formed on the surface of the impurity doped region 26 is shown, and 28 is a metal silicide film formed on the surface of the silicon semiconductor substrate 21.
A thick insulating film for isolation between elements is formed thereon by the LOCOS method.

In the case of this conventional configuration, first, a Si film with a thickness of about 5,000, for example, is selectively formed on the silicon semiconductor substrate 21 by the LOCO3 method to form an inter-element isolation insulating film of the transistor. 28, and on the active region divided by this inter-element isolation insulating film 28, a thin S layer of about 200 layers is formed by, for example, a thermal oxidation method.
in, and form a film thereon, e.g. by low pressure CVD.
A polycrystalline silicon film of approximately 2,000 layers is deposited by a method, and then a 2-layer film is deposited on top of it by, for example, a CVD method.
After forming approximately 1,000 iO□ films, these outer films are selectively patterned by photolithography and etching to form gate insulation@22. A gate electrode 23 and an insulating film 24 are used.

Next, using the gate electrode 23 as a mask, impurity ions are implanted to selectively form each impurity doped region 26 that will become the source region and drain region of the transistor, and the entire surface thereof is subjected to, for example, CVD.
A 2,000-layer I02 film is formed using a method, and this is anisotropically etched to form a gate sidewall insulating film 25 on the sidewall surface of the gate portion including the gate electrode 23.
and simultaneously form impurity doped regions 2 other than the gate portion.
After that, a Ti film of about 500 layers is deposited on the entire surface thereof by, for example, sputtering, and then a silicide reaction is performed on the impurity-doped region 26 by, for example, transient annealing. A Ti silicide film is formed only on this impurity-doped region 26 by removing the unreacted portion, and in this way, a transistor structure with low parasitic resistance is achieved as expected. This is what we are getting.

(Problem to be Solved by the Invention) However, in the structure of a semiconductor device in which the element isolation insulating film 28 of the transistor is formed by the conventional LOCoS method as described above, the source region and drain region of the transistor in this process are The edges of the metal silicide film 27 on the impurity doped region 26 and the element isolation insulating film 28 are in contact with each other, and the problem is that the substrate leakage current increases through crystal defects in this contact area. was there.

This invention was made to solve these conventional problems, and its purpose is to improve the element isolation structure of a transistor, and to improve the isolation structure and the source region of the transistor. By avoiding direct contact with the impurity-doped region that becomes the drain region, it is possible to suppress an increase in substrate leakage current and to reduce parasitic resistance in the source region and the drain region. An object of the present invention is to provide a semiconductor device of this type and a method for manufacturing the same.

[Means for Solving the Problems] In order to achieve the above object, a semiconductor device according to the present invention includes a first insulating film and a field shield that are sequentially stacked at predetermined positions on the main surface of a semiconductor substrate. A field shield portion having an electrode and a second insulating film and having a third insulating film forming a sidewall formed on the side wall surfaces thereof, and a predetermined position on the active region divided by the field shield portion. , a gate has a fourth insulating film as a gate insulating film, a gate electrode, and a fifth insulating film which are sequentially stacked, and a sixth insulating film serving as a sidewall is formed on the sidewall surfaces of these films. and impurity-doped regions as a source region and a drain region, which are formed opposite to each other with the gate region in between and have a metal silicide film formed on their surfaces.

Further, the method for manufacturing a semiconductor device according to the present invention includes sequentially stacking the first insulating film q, the field shield electrode, and the second insulating film at a predetermined position on the main surface of the semiconductor substrate,
After selectively patterning and forming these, a step of forming a third insulating film to serve as a sidewall on the side wall surface to form a field shield part, and a step of forming a predetermined area on the active region divided by the field shield part. After sequentially laminating a fourth insulating film as a gate insulating film, a gate electrode, and a fifth insulating film at the position and selectively patterning them, a sixth insulating film serving as a sidewall is formed on the sidewall surfaces of these films. forming an insulating film to form a gate portion; and using the field shield portion and gate portion as a mask, diffusing impurity doped regions as a source region and a drain region on the active region. The method is characterized in that it includes a step of forming a metal silicide film in a self-aligned manner on each of the impurity doped regions.

(Function) That is, in the present invention, a field shield electrode is formed in the field shield portion for isolation between elements through the first insulating film, and this is formed by each of the second and third insulating films. By applying a bias to this field shield electrode, the desired element isolation effect can be obtained.Also, metal is applied in a self-aligned manner over each impurity doped region that will become the source and drain regions. Because a wrinkled side film is formed, substrate leakage current due to crystal defects is suppressed, and parasitic resistance is It is possible to reduce the

〔Example〕

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a semiconductor device and a method for manufacturing the same according to the present invention will be described in detail below with reference to FIGS. 1 and 2.

FIG. 1 is a cross-sectional view schematically showing the general structure of a semiconductor device to which this embodiment is applied, and FIGS. Each of the figures shown in FIG.

That is, also in the configuration of the embodiment device shown in FIG.
Reference numeral 1 is a silicon semiconductor substrate, and 2.3 and 4
1 and 2 respectively show a gate insulating film (fourth insulating film), a gate electrode, and an insulating film (fifth insulating film) as a gate portion, which are sequentially stacked and provided on a selected portion of this silicon semiconductor substrate l. Reference numeral 5 denotes a gate sidewall insulating film (sixth insulating film) formed on the side wall surface of this gate portion.

Further, 6 is an impurity-doped region on the main surface of the silicon semiconductor substrate 1, which is selectively diffused so as to sandwich the gate portion, and becomes a source region and a drain region of the transistor, and 7 is an impurity-doped region. A metal silicide film formed in a self-aligned manner on the surface of this impurity doped region 6 is shown, and 8.9 and IO are ffr located on the silicon semiconductor substrate I, and fields formed for isolation between elements. Insulating film (first
II shows the field shield sidewall insulating film (third insulating film) formed on the side wall surface of this field shield part. ).

The manufacturing process for this embodiment configuration is shown in FIG. 2(a).
As shown in (r), first, a 5in2 film 8a of about 200 layers is formed on the entire surface of a silicon semiconductor substrate l by, for example, a thermal oxidation method, and then, For example, by depositing about 2,000 layers of polycrystalline silicon film 9a by low-pressure CVD method, and then depositing about 2,000 layers of silicon film 9a on it by, for example, CVD method.
After forming the i02 film 10a (FIG. 1(a)), these winter clothes 8a to 10a are sequentially and selectively patterned by photolithography and etching to form an insulating film as a field shield part. (First insulating film) 8
．． A field shield electrode 9 and an insulating film (second insulating film) 10 are formed respectively (FIG. 2(b)), and a 200% insulating film is deposited on the entire surface thereof by, for example, the CVD method.
A field shield sidewall insulating film (third insulating flu) I is formed on the side wall surface of the field shield portion including the field shield electrode 9 by forming an approximately 0 Sin2 film and anisotropically etching it.
t is formed, and at the same time, the active region of the substrate surface other than this field shield portion is exposed (FIG. 4(C)).

Next, on the active region divided by the field shield part, a thin SiO□ film of about 200 layers is formed by, for example, a thermal oxidation method, and a thin SiO□ film of about 2,000 layers is formed thereon by, for example, a low-pressure CVD method. A crystalline silicon film of about 0S is deposited, and further deposited on top of it by, for example, CVD.
After forming approximately 2,000 SiO□ films using the method, these winter clothes were sequentially and selectively patterned using photolithography and etching methods to form a gate insulating film (fourth insulating film) as a gate part. )2. A gate electrode 3 and an insulating film (fifth insulating film) 4 are formed respectively (FIG. 4(d)), and impurity ions are implanted using the field shield part and gate part as a mask to form a transistor. Each impurity doped region 6, which will become a source region and a train region, is selectively formed (FIG. 4(e)).

Next, a coating of 20
By forming a 0Sin2 film on the order of 0.00 people and anisotropically etching it, a gate sidewall insulating film (sixth insulating film) 5 is formed on the side wall surface of the gate portion including the gate electrode 3. After depositing about 500 Ti films on these entire surfaces by, for example, sputtering, a silicide reaction is caused on the impurity-doped regions 6 by, for example, transient annealing, and the unreacted portions are removed. By removing the metal silicide film 7., only on this impurity doped region 6. In this S, a Ti silicide film is formed in a self-aligned manner (FIG. 6(f)), and in this way, the desired transistor configuration is obtained.

Therefore, in the case of this embodiment configuration, the insulating film (first insulating film) 8 is provided in the field shield section for isolation between elements.
The field shield electrode 9 is formed through the insulating film (second insulating film) 10 and the field shield sidewall insulating film (third insulating film) 11.
By applying a bias voltage to , it is possible to achieve the desired element isolation effect, and a metal silicide film is formed in a self-aligned manner on each impurity doped region 6 that becomes the source region and drain region. 7, in addition to the structure of the field shield part,
In addition to satisfactorily suppressing the substrate reflow current associated with crystal defects, it is also possible to effectively reduce parasitic resistance.

In the above embodiments, the field shield sidewall insulating film (third insulating film) may be formed using an insulating film interposed on the semiconductor substrate surface, and the field shield electrode may also be formed using an insulating film interposed on the semiconductor substrate surface. In addition to the polycrystalline silicon film, a silicide film, a polycide film, etc. may be used, and as a metal silicide film,
In addition to Ti, any metal that causes a silicide reaction may be used.

〔Effect of the invention〕

As detailed above, according to the present invention, in a semiconductor device, a field shield electrode is provided between the semiconductor substrate and the first insulating film as a field shield portion for isolation between elements, and By applying a bias to this field shield electrode,
It is possible to achieve the desired isolation effect between elements, and
Since a metal silicide film was formed in a self-aligned manner on each impurity-doped region that would become the source region and drain region, it was possible to achieve inter-element isolation using the conventional LOCOS method in conjunction with the structure of the field shield section. Unlike the case of an insulating film, it is possible to effectively suppress the substrate leakage current caused by crystal defects, and at the same time, it is possible to effectively reduce the parasitic resistance. Since it is exactly the same as that of the gate section of the present invention, it has excellent features such as being easily formed.

[Brief explanation of the drawing]

FIG. 1 is a sectional view schematically showing the general structure of a semiconductor device to which an embodiment of the present invention is applied, and FIGS. 2(a) to 2(f)
) are cross-sectional views sequentially schematically showing the main manufacturing steps of the semiconductor device, and FIG. 3 is a cross-sectional view schematically showing the general structure of a conventional semiconductor device. l...Silicon semiconductor substrate, 2...gate insulating film (fourth insulating film), 3...gate electrode, 4...
- Absolute M crotch (fifth insulating film), 5... gate side wall insulating film (sixth insulating film), 6... impurity doped region, 7... metal silicide film, 8a and 8・
...SiO□ film and insulating film (first insulating film), 9a
and 9... polycrystalline silicon film and field shield electrode, IOa and 10...5in2 film and insulating film (second insulating film), 11... field shield side fall insulating film (third insulation film). Agent Masuo Oiwa Figure 1 Figure 2 (b) (e) (f)

Claims (2)

[Claims] (1) A first insulating film, a field shield electrode, and a second insulating film are sequentially stacked at predetermined positions on the main surface of the semiconductor substrate, and a first insulating film, a field shield electrode, and a second insulating film are formed on the sidewall surfaces of these films to form sidewalls. A fourth insulating film as a gate insulating film, a gate electrode, and a fifth insulating film, which are sequentially stacked at predetermined positions on the active region divided by the field shield part, a field shield part on which the insulating film of No. 3 is formed, a fourth insulating film as a gate insulating film, a gate electrode, and a fifth insulating film. and a sixth insulating film serving as a sidewall on these sidewall surfaces.
A semiconductor device comprising: a gate portion formed with an insulating film; and impurity doped regions as a source region and a drain region formed opposite to each other with the gate portion interposed therebetween and having a metal silicide film formed on the surface thereof. . (2) After sequentially laminating the first insulating film, field shield electrode, and second insulating film at predetermined positions on the main surface of the semiconductor substrate and selectively patterning them, the sidewall surfaces of these forming a third insulating film to serve as a sidewall to form a field shield portion, and forming a fourth insulating film as a gate insulating film at a predetermined position on the active region divided by the field shield portion; After sequentially laminating the electrode and the fifth insulating film and selectively patterning them, forming a sixth insulating film to serve as a sidewall on the sidewall surface of these to form a gate portion; using the field shield part and the gate part as a mask to diffuse and form each impurity doped region as a source region and a drain region on the active region, and form a metal silicide film in a self-aligned manner on each of the impurity doped regions. A method for manufacturing a semiconductor device, comprising the steps of: