JPH07106559A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To realize high reliability and low-cost by simultaneously forming an insulating film covering the side surface of a gate electrode and an insulating film covering the boundary between an element isolating region and a transistor active region. CONSTITUTION:After a field oxide film 102 is formed and a gate oxide film 103 is formed on a P-type silicon substrate 101, a polycrystalline silicon film 104 is deposited thereon to form a gate electrode in the predetermined position by the patterning. Next, after an oxide silicon film 105 is deposited thereon, a silicon oxide film 107 covering simultaneously the side surface of gate electrode and bondary between the element isolating region and transistor active region is formed by the dry etching technology. Next, after the source, drain layer 108 are formed using the silicon oxide film 107 as the mask and titanium film 109 is deposted thereon, a titanium silicide layer is formed on the transistor active region sourrounded by the gate electrodes and silicon oxide film 107.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device of low cost and high reliability.

[0002]

2. Description of the Related Art In recent years, with the increase in speed and power consumption of semiconductor devices, there is a need for a method (salicide) of forming a refractory metal layer (silicide layer) in a self-aligned manner on an active region and a gate electrode. It is rising. However, stress concentrates near the boundary between the field oxide film and the active region of the semiconductor device, and there are many crystal defects. Therefore, when salicided, the silicide layer abnormally grows due to the above defects.
Since the silicide layer penetrates through the source / drain diffusion layer, there is a problem that a leak current is generated between the source / drain diffusion layer and the substrate. A method of manufacturing a semiconductor device that solves the above problem is disclosed in, for example, Japanese Patent Application Laid-Open No. 62-221156.

A method of manufacturing the above-mentioned conventional semiconductor device will be described in detail below. First, as shown in FIG. 2A, an active region is determined by forming an oxide film 202 on a silicon substrate 201 by a local oxidation method, and after that, a gate electrode 203 is formed of polycrystalline silicon. ,
The diffusion layer 204 is formed by the ion implantation method. Next, as shown in FIG. 2B, a silicon nitride film 205 is deposited on the entire surface and the silicon nitride film 205 and the oxide film thereunder are selectively removed by etching using the photoresist 206 as a mask. As shown in FIG. 2C, the metal film 20
7 is deposited on the entire surface. Next, as shown in FIG. 2D, a thermal process is applied to form a silicide layer 208, and the metal film 207 is entirely etched and removed.
The semiconductor device is completed.

As described above, according to the conventional method of manufacturing a semiconductor device, after the source and drain diffusion layers are formed, an insulating film is deposited on the entire surface and the insulating film is selectively removed to form a boundary between the element isolation region and the active region. It is not silicidized in the vicinity, and prevents generation of leak current between the source / drain diffusion layer and the substrate due to abnormal growth of the silicide layer which occurs near the boundary between the element isolation region and the active region.

[0005]

However, in the semiconductor device as described above, the insulating film is not formed on the gate side surface in a self-aligned manner, and when it is attempted to be formed, the first insulating film is formed on the gate side surface. After forming the second insulating film, a step of depositing a second insulating film and selectively etching the second insulating film to form a third insulating film covering the boundary between the element isolation region and the active region is required. Moreover, there is a problem that the cost increases.

The present invention is to solve the above-mentioned conventional problems, and a source generated at a boundary between an element isolation region and an active region,
An object of the present invention is to provide a method for manufacturing a semiconductor device, which improves reliability by preventing a leak current between a drain diffusion layer and a substrate and realizes cost reduction.

[0007]

In order to solve the above problems, a method of manufacturing a semiconductor device according to the present invention comprises forming a field oxide film on a silicon substrate and then forming a gate oxide film on the transistor active region. Forming step, depositing a polycrystalline silicon film on the semiconductor substrate, patterning the polycrystalline silicon to form a gate electrode, and depositing a first insulating film on the entire surface of the semiconductor substrate. And a second insulating film that covers the boundary between the element isolation region and the transistor active region with a photoresist and then simultaneously covers the gate electrode side and the boundary between the device isolation region and the transistor active region by a dry etching technique. Forming a source and drain diffusion layer using the insulating film as a mask, and forming a metal film on the entire surface of the semiconductor substrate. A step of, said active region surrounded by the second insulating film and a step of siliciding said gate electrode electrode.

[0008]

With the above structure, since the boundary between the active region and the field oxide film is not silicidized, abnormal growth of the silicide layer at the boundary between the field insulating film and the active region does not occur, and the source / drain diffusion layer and the substrate The leakage current can be prevented from occurring and the cost can be reduced by simultaneously forming the insulating film covering the side surface of the gate electrode and the insulating film covering the boundary between the element isolation region and the transistor active region.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method of manufacturing a semiconductor device according to an embodiment of the present invention will be described below with reference to the drawings.

1A to 1D are sectional views showing steps in a method of manufacturing a semiconductor device according to the present invention. First, as shown in FIG.
A field oxide film 102 of 300 nm is formed by thermal oxidation on a P-type silicon substrate 101, a gate oxide film 103 of 8 nm is formed by thermal oxidation, and a polycrystalline silicon film 104 of 300 nm is deposited by a low pressure CVD method, followed by a dry etching technique. Is used to form a gate electrode by patterning at a predetermined position.

Next, as shown in FIG. 1B, a silicon oxide film 105 is deposited thereon to a thickness of 140 nm by the low pressure CVD method. Next, as shown in FIG. 1C, the photoresist 106 is patterned so as to cover the boundary between the element isolation region and the transistor active region, and as shown in FIG. 1D, a gate is formed by using a dry etching technique. After forming the silicon oxide film 107 that covers the electrode side surface and the boundary between the element isolation region and the transistor active region at the same time, the source and drain layers 108 are formed by ion implantation using the silicon oxide film 107 as a mask.

Next, as shown in FIG. 1 (e), a titanium film 109 having a thickness of 50 nm is deposited thereon by sputtering,
As shown in FIG. 1F, lamp annealing is performed at 625 ° C. for 60 seconds to form a titanium silicide layer 110 on the transistor active region surrounded by the gate electrode and the silicon oxide film 107.
Then, the titanium film 109 is removed using a mixed solution of hydrogen sulfide and hydrogen peroxide, and lamp annealing is performed at 825 ° C. for 60 seconds to activate the titanium silicide layer 110, thereby completing the transistor.

In this embodiment, the silicon oxide film is used for the side surface of the gate electrode and the insulating film that simultaneously covers the element isolation region and the transistor active region, but the same effect can be obtained by using the silicon nitride film.

In the present embodiment, the source and drain diffusion layers are formed by ion implantation after forming the insulating film covering the side surface of the gate electrode and the boundary between the element isolation region and the active region. By performing the second ion implantation and further forming an insulating film that simultaneously covers the side surface of the gate electrode and the element isolation region and the transistor active region, the second ion implantation is performed to perform LDD (Lightly Doped Drai).
n) A source / drain diffusion layer having a structure can be formed.
By adopting the LDD structure, the deterioration of the element due to the electric field can be alleviated, and the reliability is further improved.

[0015]

As described above, according to the present invention, cost reduction can be realized by simultaneously forming the insulating film covering the side surface of the gate electrode and the boundary between the element isolation region and the active region.
When forming the source and drain diffusion layers, the first ion implantation is performed after the gate electrode is formed, and the second ion implantation is performed after the insulating film that covers the gate electrode side surface and the boundary between the element isolation region and the active region is formed. By doing LDD
Source and drain diffusion layers having a structure can be formed, and the effect of further improving reliability can be obtained.

[Brief description of drawings]

FIG. 1 is a process sectional view of a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a process sectional view of a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

 101 Silicon Substrate (Semiconductor Substrate) 102 Field Oxide Film 103 Gate Oxide Film 104 Polycrystalline Silicon (for Gate Electrode) 105 Silicon Oxide Oxide Film (First Insulation Film) 106 Photoresist 107 Silicon Oxide Film (Second Insulation Film) 108 Source / Drain Diffusion 109 Titanium Film 110 Titanium Silicide Layer 201 Silicon Substrate (Semiconductor Substrate) 202 Oxide Film 203 Gate Electrode 204 Diffusion Layer 205 Silicon Nitride Film 206 Photoresist 207 Metal Film 208 Silicide Layer

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Shohei Shinohara 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.

Claims (2)

[Claims] 1. A step of forming a device isolation region and an active region on a semiconductor substrate of one conductivity type, and then forming a gate oxide film on the active region, and depositing a polycrystalline silicon film on the semiconductor substrate. Then, the step of patterning the polycrystalline silicon to form a gate electrode, the step of depositing a first insulating film on the entire surface of the semiconductor substrate, and the boundary between the element isolation region and the active region covered with a photoresist. After that, a dry etching technique is used to cover the side of the gate electrode in a self-aligning manner and at the same time selectively cover the boundary between the element isolation region and the active region, and not be formed on at least a part of the active region. A step of forming a second insulating film, a step of forming a source / drain diffusion layer using the second insulating film as a mask, and a step of forming a metal film on the entire surface of the semiconductor substrate. , Wherein the active region surrounded by the second insulating film and method of manufacturing a semiconductor device including the step of siliciding said gate electrode electrode. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the second insulating film is a silicon oxide film.