JPS62103317U - - Google Patents
Info
- Publication number
- JPS62103317U JPS62103317U JP19666285U JP19666285U JPS62103317U JP S62103317 U JPS62103317 U JP S62103317U JP 19666285 U JP19666285 U JP 19666285U JP 19666285 U JP19666285 U JP 19666285U JP S62103317 U JPS62103317 U JP S62103317U
- Authority
- JP
- Japan
- Prior art keywords
- resistance
- layers
- layer
- wiring
- wiring layers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
Description
第１図は本考案の一実施例の平面パターン図、
第２図は第１図の対応回路図、第３図は従来の分
圧回路の平面パターン図、第４図は第３図の対応
回路図である。
１，２，３…抵抗層、４…スルーホール、５，
５′…配線層。
FIG. 1 is a plan pattern diagram of an embodiment of the present invention.
2 is a circuit diagram corresponding to FIG. 1, FIG. 3 is a plan pattern diagram of a conventional voltage dividing circuit, and FIG. 4 is a circuit diagram corresponding to FIG. 3. 1, 2, 3...resistance layer, 4...through hole, 5,
5'...Wiring layer.
Claims (1)
層を覆う絶縁層と、該絶縁層に設けられた複数の
スルーホールを介して前記抵抗層と接続する複数
の配線層とを備え、該配線層によつて、抵抗層全
てが直列に接続され、且つ直列接続された抵抗層
の両端に印加された基準電位を分割して、抵抗層
から分割電圧を取り出す分圧回路において、 前記抵抗層は奇数本であり、中央に形成されて
いる抵抗層と接続されている配線層のうち中央の
配線層もしくはそれに相当する２つの配線層を中
心に、基準電位が印加されている夫々の端部まで
の配線層の数は、その両側で等しい事を特徴とす
る分圧回路。[Claims for Utility Model Registration] A plurality of resistance layers formed on a substrate, an insulating layer covering each resistance layer, and a connection to the resistance layer through a plurality of through holes provided in the insulating layer. All of the resistance layers are connected in series through the wiring layers, and a reference potential applied to both ends of the resistance layers connected in series is divided, and a divided voltage is output from the resistance layer. In the voltage divider circuit to be taken out, there are an odd number of resistance layers, and a reference potential is set around the center wiring layer or two wiring layers corresponding to it among the wiring layers connected to the resistance layer formed in the center. A voltage dividing circuit characterized in that the number of wiring layers up to each end to which is applied is equal on both sides.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985196662U JPH0438602Y2 (en) | 1985-12-20 | 1985-12-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985196662U JPH0438602Y2 (en) | 1985-12-20 | 1985-12-20 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62103317U true JPS62103317U (en) | 1987-07-01 |
| JPH0438602Y2 JPH0438602Y2 (en) | 1992-09-09 |
Family
ID=31155687
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1985196662U Expired JPH0438602Y2 (en) | 1985-12-20 | 1985-12-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0438602Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0237838A (en) * | 1988-07-27 | 1990-02-07 | Sharp Corp | A/d converter |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111223621B (en) * | 2018-11-26 | 2022-07-19 | 致茂电子(苏州)有限公司 | Resistor with a resistor element |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57203326A (en) * | 1981-06-09 | 1982-12-13 | Toshiba Corp | Analog-to-digital converter |
-
1985
- 1985-12-20 JP JP1985196662U patent/JPH0438602Y2/ja not_active Expired
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57203326A (en) * | 1981-06-09 | 1982-12-13 | Toshiba Corp | Analog-to-digital converter |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0237838A (en) * | 1988-07-27 | 1990-02-07 | Sharp Corp | A/d converter |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0438602Y2 (en) | 1992-09-09 |