JPS6195469A - マルチプロセツサの競合制御方式 - Google Patents

マルチプロセツサの競合制御方式

Info

Publication number
JPS6195469A
JPS6195469A JP21679284A JP21679284A JPS6195469A JP S6195469 A JPS6195469 A JP S6195469A JP 21679284 A JP21679284 A JP 21679284A JP 21679284 A JP21679284 A JP 21679284A JP S6195469 A JPS6195469 A JP S6195469A
Authority
JP
Japan
Prior art keywords
processor
bus
control unit
signal
contention control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP21679284A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0142017B2 (enrdf_load_stackoverflow
Inventor
Takumi Kishino
岸野 琢巳
Shigeru Hashimoto
繁 橋本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP21679284A priority Critical patent/JPS6195469A/ja
Publication of JPS6195469A publication Critical patent/JPS6195469A/ja
Publication of JPH0142017B2 publication Critical patent/JPH0142017B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G06F13/364Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Bus Control (AREA)
JP21679284A 1984-10-16 1984-10-16 マルチプロセツサの競合制御方式 Granted JPS6195469A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21679284A JPS6195469A (ja) 1984-10-16 1984-10-16 マルチプロセツサの競合制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21679284A JPS6195469A (ja) 1984-10-16 1984-10-16 マルチプロセツサの競合制御方式

Publications (2)

Publication Number Publication Date
JPS6195469A true JPS6195469A (ja) 1986-05-14
JPH0142017B2 JPH0142017B2 (enrdf_load_stackoverflow) 1989-09-08

Family

ID=16693944

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21679284A Granted JPS6195469A (ja) 1984-10-16 1984-10-16 マルチプロセツサの競合制御方式

Country Status (1)

Country Link
JP (1) JPS6195469A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02170256A (ja) * 1988-12-23 1990-07-02 Ricoh Co Ltd バス制御方法および装置
JP2004348745A (ja) * 2003-05-23 2004-12-09 Samsung Electronics Co Ltd 高速の帯域幅のシステムバスを仲裁するためのバスシステム及びその方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02170256A (ja) * 1988-12-23 1990-07-02 Ricoh Co Ltd バス制御方法および装置
JP2004348745A (ja) * 2003-05-23 2004-12-09 Samsung Electronics Co Ltd 高速の帯域幅のシステムバスを仲裁するためのバスシステム及びその方法

Also Published As

Publication number Publication date
JPH0142017B2 (enrdf_load_stackoverflow) 1989-09-08

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