JPS6186804A - Electronic controller for engine - Google Patents

Abstract

PURPOSE:To avoid the stop of an engine driving when a hit occurs by protecting the data on a microcomputer CPU with the interruption signal given from a voltage detecting means and monitors the clock signal to reset the CPU. CONSTITUTION:The hit of an electric power supply A is first detected by the voltage detecting means C, and the interruption signal is delivered to the microcomputer CPU B. The CPU shunts the data to a waiting memory and is set under a dynamic stop state. No clock signal is produced in said dynamic stop state and therefore a watchdog circuit D which detected the break of the clock resets the CPU after the hit is recovered. Thus the normal operation of the CPU is restarted. This prevents the stop of the engine driving.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is directed to standby memory (standby RAM, 5TAND
Regarding the engine electronic control device that uses a microcomputer (BY RAM), please refer to
The present invention relates to an electronic engine control device that prevents the engine from stopping even when there is a power outage or a momentary power outage.

[Prior Art 1] In large-scale computers and the like, when the power supply drops, it is common practice to perform v1-inclusive processing with the highest priority to preserve the contents of the memory. However, when this technology is applied to automotive engine control, problems arise. In other words, in addition to the normal power OFF state, the power supply connected to the computer may drop momentarily, and even in such cases, normal operation may be restored. There is a need.

Conventionally, as this type of device, JP-A ON 5 B-125
There was one published in Publication No. 102. In other words, this device is equipped with a voltage detection means for detecting the power supply voltage to the microcomputer, and when this detection means detects that the voltage is higher than the microcomputer operating voltage and lower than a predetermined set value, it interrupts the microcomputer. The program protects the memory contents when the power is turned off or during a momentary power outage.

[Problems to be Solved by the Invention] However, in the above-mentioned conventional technology, the memory contents are retained based on the program contents both when the power is turned off and when there is a momentary power outage, so the program becomes complicated. There was a drawback.

The present invention has been made to solve the above-mentioned conventional drawbacks, and it is possible to reliably protect data in the time memory of a microcomputer with a simple program when the power is turned off or during a momentary power outage. An object of the present invention is to provide an electronic engine control device that can avoid a state in which the engine stops.

Means for Solving Problem L] The structure of the present invention made to achieve the above object is as follows:
When a microcomputer B connected to a DC power supply A and provided with a standby memory detects that the DC power supply A has a voltage lower than a predetermined setting voltage and higher than the operating voltage of the microcomputer B, the microcomputer B is connected to a DC power supply A and has a standby memory. Interrupts computer B (receives the voltage detection means C that generates No. 3 and the time clock signal from microcomputer B,
A watchdog circuit is provided which supplies a reset signal to the microcomputer B when the time clock signal disappears, and when the microcomputer B receives the interrupt signal, the contents of the standby memory are retained. It is characterized in that it is configured to perform processing and stop supplying the time clock signal.

[Function] According to the configuration of the present invention, the interrupt signal from the voltage detection means causes the
The data of the microcomputer is held in a standby memory to protect the data, and in the event of a momentary power outage, a reset signal is supplied from the watchdog circuit to the microcomputer to restore normal operation of the microcomputer.

[Example] An embodiment of the present invention will be described below with reference to the drawings.

In Figure 2, 1 is a DC power supply, 2 is this DC' power supply 1
connected via ignition switch 3 to 5V
The constant voltage V1 of the microcomputer 4 (hereinafter referred to as CPI
It's called J. ), 5 is the above CP
After receiving the time clock signal from U4, the CPU
A watchdog circuit that detects whether the operation of 4 is normal or not;
6 is a voltage detection circuit, one input terminal 7 of this detection circuit 6 is connected to the DC power supply 1, and the other input terminal 8 is connected to the C
It is connected to a comparison power supply (not shown) set to a predetermined set voltage Va that is higher than the operating voltage of the PU4. In the L configuration circuit 6, the power supply voltage V of the DC power supply 1 is a set voltage va.
It is configured to supply an interrupt signal NMI to the CPU 4 when the voltage drops further. The CPU 4 has a built-in timing memory (not shown) connected to a power source.

In each circuit of the above configuration, various signals are sent and received as shown in Figs. 3 and 5. Fig. 3 shows the case when the power is turned off by opening the ignition switch 3, and Fig. 5 shows the case when the power is turned off by opening the ignition switch 3. The following cases are shown below. In the figure,
■1 is the output voltage of the stabilized power supply circuit 2, NIVlr is the interrupt signal of the voltage detection circuit 6, t is the time clock signal, RE
is a reset signal sent from the watchdog circuit 5 to the CPLI 4.

Next, the operation of the above configuration will be explained.

First, the power supply voltage ■ of the DC power supply 1 is as shown in Fig. 3,
A case where the temperature gradually decreases will be explained.

The ignition switch 3 is opened and the power supply voltage V gradually decreases from time t1, while the constant voltage V1 of the stabilized power supply circuit 2 is maintained at a normal voltage of 5.
When the power supply voltage V becomes lower than the set voltage Va at the input terminal 8 of the voltage detection circuit 6, an output signal is generated from the detection circuit 6, and this becomes the interrupt signal NM of the CPU 4 and becomes the CPU 4 interrupt signal NM.
Entered into U4. In CPU4, this interrupt (No. 8 NM
In response to I, the program shown in FIG. 4 is executed. In FIG. 4, first, at step 20, processing is performed to maintain the contents of the standby memory, and then, at step 30, a so-called dynamic stop processing is performed in which a jump is made to the own address. While this dynamic stop processing is being performed, the power supply voltage V gradually decreases, and C
PU4 stops its function.

By the way, the watchdog circuit 5 receives the time clock signal t during normal operation of the CPU 4 and outputs the reset signal R.
Although E is not sent to the CPU 4, the time clock signal t disappears when the dynamic stop processing is performed. As a result, the reset signal RE is sent from the watchdog circuit 5 to the CPU 4. At this time, if the power supply voltage has not yet fallen sufficiently, the reset signal RE may be sent to the CPU 4 and the CPU 4 may be reset. However, in any case, the CPU 4 eventually stops functioning due to a drop in the power supply voltage V.

Next, a case where the power supply voltage V drops instantaneously as shown in FIG. 5 will be described. In FIG. 5, the power supply voltage V decreases from time t11, and at time t12, the set voltage V
When the voltage drops to a, the interrupt signal NMI is supplied from the voltage detection circuit 6 to the CPU 4, as in the case of FIG.
As shown in the figure, standby memory maintenance and dynamic stop processing are performed. Then, when the power supply voltage V rises to the original voltage, the constant voltage V of the stabilized power supply circuit 2
1 maintains a normal voltage of 5V, so CPU4
The dynamic stop process will be repeated, and it is necessary to escape from this state.

By the way, when the CPU 4 is performing the dynamic stop process, the time clock signal [ of the CPU 4 ] disappears at time t13, so the reset signal RE is sent from the watchdog circuit 5 to the CPU 4 at time t14. Thereby, the CPU 4 escapes from the dynamic stop process and returns to a normal operating state.

Therefore, by providing the watchdog circuit 5, the CPU 4 maintains the data contents of the standby memory even in the event of a momentary power failure as shown in FIG. do not have.

Moreover, the program processed by the CPU 4 includes a step of maintaining the contents of the special memory, as shown in FIG.
Since it is only necessary to have dynamic stop processing, the program becomes simple.

In the above embodiment, when the CPU 4 receives the interrupt signal NMI, the dynamic stop process is performed, but the present invention is not limited to this. When the CPU 4 receives the interrupt signal NM+, the time clock signal t to the watchdog circuit 5 is stopped. For example, the HΔLT instruction may be used.

[Effects of the Invention] As explained above, according to the present invention, the data of the microcomputer is protected by a standby mode with a simple program when the power is turned off or momentary power is cut off, and the engine is You can avoid the situation where the system stops.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing the configuration of the present invention, Fig. 2 is a block diagram showing an embodiment of the invention, Fig. 3 is a time chart showing the operation of the embodiment, and Fig. 4 is according to the embodiment. Flowchart, FIG. 5 is a time chart explaining the operation of the same embodiment. A... DC power supply B... Microcomputer (CPU) C... Voltage detection means D... Watchdog circuit ■... Power supply voltage NMI... Interrupt signal t... Time clock signal RE ...Reset signal

Claims (1)

[Scope of Claims] A microcomputer connected to a DC power source and provided with a standby memory, when detecting that the DC power source has a voltage lower than a predetermined setting voltage and higher than the operating voltage of the microcomputer, comprising voltage detection means for generating an interrupt signal to the microcomputer; and a watchdog circuit that receives a time clock signal from the microcomputer and supplies a reset signal to the microcomputer when the time clock signal disappears; An engine electronic control device, wherein the microcomputer is configured to hold the contents of the standby memory and not supply the time clock signal when receiving the interrupt signal.