JPS6185158U - - Google Patents
Info
- Publication number
- JPS6185158U JPS6185158U JP1984170889U JP17088984U JPS6185158U JP S6185158 U JPS6185158 U JP S6185158U JP 1984170889 U JP1984170889 U JP 1984170889U JP 17088984 U JP17088984 U JP 17088984U JP S6185158 U JPS6185158 U JP S6185158U
- Authority
- JP
- Japan
- Prior art keywords
- heat sink
- flat heat
- melting point
- low melting
- filler metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 5
- 238000005219 brazing Methods 0.000 claims description 3
- 230000008018 melting Effects 0.000 claims description 3
- 238000002844 melting Methods 0.000 claims description 3
- 239000000919 ceramic Substances 0.000 claims description 2
- 239000000945 filler Substances 0.000 claims 2
- 230000017525 heat dissipation Effects 0.000 claims 2
- 239000002184 metal Substances 0.000 claims 2
- 239000000463 material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
Landscapes
- Cooling Or The Like Of Electrical Apparatus (AREA)
Description
第1図a,bはこの考案の一実施例を適用した
半導体装置用放熱板を示す側面図および平面図で
あり、第2図a,bおよび第3図は従来の各別例
による放熱板付半導体装置の概要構成を示す断面
図、底面図および斜視図である。 1…半導体素子その他の回路部品をマウントし
たセラミツク厚膜回路基板、2…平板形放熱板、
3…低融点ろう材。
半導体装置用放熱板を示す側面図および平面図で
あり、第2図a,bおよび第3図は従来の各別例
による放熱板付半導体装置の概要構成を示す断面
図、底面図および斜視図である。 1…半導体素子その他の回路部品をマウントし
たセラミツク厚膜回路基板、2…平板形放熱板、
3…低融点ろう材。
Claims (1)
- 半導体電子部品のセラミツク厚膜回路基板など
の放熱面に、低融点ろう材を用いて平板形放熱板
を接着固定する構成において、前記低融点ろう材
による接着時に、熱膨張率の差によつて生ずる平
板形放熱板の反りを補正するため、この平板形放
熱板に対して、予め意図的に反対方向の反りを賦
与させたことを特徴とする半導体装置用放熱板構
造。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1984170889U JPS6185158U (ja) | 1984-11-09 | 1984-11-09 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1984170889U JPS6185158U (ja) | 1984-11-09 | 1984-11-09 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6185158U true JPS6185158U (ja) | 1986-06-04 |
Family
ID=30728598
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1984170889U Pending JPS6185158U (ja) | 1984-11-09 | 1984-11-09 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6185158U (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
USRE43341E1 (en) | 1995-06-07 | 2012-05-01 | Danisco A/S | Method of improving the properties of a flour dough, a flour dough improving composition and improved food products |
-
1984
- 1984-11-09 JP JP1984170889U patent/JPS6185158U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
USRE43341E1 (en) | 1995-06-07 | 2012-05-01 | Danisco A/S | Method of improving the properties of a flour dough, a flour dough improving composition and improved food products |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS6185158U (ja) | ||
JPS6350853Y2 (ja) | ||
JPH0727646Y2 (ja) | プリント基板 | |
JPH0543488Y2 (ja) | ||
JPS5942097U (ja) | 放熱板取り付け構造 | |
JPH035662B2 (ja) | ||
JPH0289844U (ja) | ||
JPS60183434U (ja) | 集積回路形成用ウエハ | |
JPS5866690U (ja) | ハイブリツド集積回路 | |
JPH0173931U (ja) | ||
JPS60124094U (ja) | 印刷配線基板 | |
JPS6096895U (ja) | 集積回路の放熱構造 | |
JPH0454854U (ja) | ||
JPS58194044U (ja) | 感熱記録ヘツド | |
JPS6446239U (ja) | ||
JPS6130252U (ja) | 半導体装置 | |
JPH0714017B2 (ja) | 混成集積回路及びその製造方法 | |
JPS61149354U (ja) | ||
JPH0227759U (ja) | ||
JPS60119748U (ja) | 半導体装置 | |
JPS63239830A (ja) | 半導体チツプの実装方法 | |
JPS60101795U (ja) | 厚膜回路基板 | |
JPH0310547U (ja) | ||
JPS63105331U (ja) | ||
JPS5942095U (ja) | 放熱板取り付け構造 |