JPS61149354U - - Google Patents
Info
- Publication number
- JPS61149354U JPS61149354U JP3169985U JP3169985U JPS61149354U JP S61149354 U JPS61149354 U JP S61149354U JP 3169985 U JP3169985 U JP 3169985U JP 3169985 U JP3169985 U JP 3169985U JP S61149354 U JPS61149354 U JP S61149354U
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- side frame
- metal layer
- metal piece
- metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000002184 metal Substances 0.000 claims description 6
- 239000004065 semiconductor Substances 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims description 4
- 239000011347 resin Substances 0.000 claims description 3
- 229920005989 resin Polymers 0.000 claims description 3
- 238000005219 brazing Methods 0.000 claims 1
- 229910000679 solder Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
Landscapes
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
Description
第１図は本考案の一実施例の要部断面図、第２
図は従来例の要部断面図、第３図は本考案の実施
される半導体装置の外観斜視図、第４図は本考案
による樹脂側枠の三つの実施例を示す要部断面図
である。 １：金属基板、２：回路パターン、３：半導体
素体あるいは回路部品、５：樹脂側枠、８：金属
片、９：はんだ。
図は従来例の要部断面図、第３図は本考案の実施
される半導体装置の外観斜視図、第４図は本考案
による樹脂側枠の三つの実施例を示す要部断面図
である。 １：金属基板、２：回路パターン、３：半導体
素体あるいは回路部品、５：樹脂側枠、８：金属
片、９：はんだ。
Claims (1)
- 少なくとも表面に金属層を有する基板上に支持
された半導体素体あるいは回路部品を包囲する絶
縁性樹脂からなる側枠が基板上に固定されるもの
において、側枠に予めろう付性良好な金属片が一
体化され、該金属片と基板の金属層がろう付けさ
れたことを特徴とする半導体装置。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3169985U JPS61149354U (ja) | 1985-03-06 | 1985-03-06 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3169985U JPS61149354U (ja) | 1985-03-06 | 1985-03-06 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61149354U true JPS61149354U (ja) | 1986-09-16 |
Family
ID=30532537
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3169985U Pending JPS61149354U (ja) | 1985-03-06 | 1985-03-06 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61149354U (ja) |
-
1985
- 1985-03-06 JP JP3169985U patent/JPS61149354U/ja active Pending