JPS6184065A - Manufacture of thin film transistor - Google Patents
Manufacture of thin film transistorInfo
- Publication number
- JPS6184065A JPS6184065A JP20411384A JP20411384A JPS6184065A JP S6184065 A JPS6184065 A JP S6184065A JP 20411384 A JP20411384 A JP 20411384A JP 20411384 A JP20411384 A JP 20411384A JP S6184065 A JPS6184065 A JP S6184065A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- gate
- gate electrode
- layer
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 7
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 238000000034 method Methods 0.000 claims abstract description 13
- 229910052751 metal Inorganic materials 0.000 claims abstract description 10
- 239000002184 metal Substances 0.000 claims abstract description 10
- 239000000758 substrate Substances 0.000 claims abstract description 8
- 230000001590 oxidative effect Effects 0.000 claims description 2
- 239000010408 film Substances 0.000 abstract description 14
- 229910021417 amorphous silicon Inorganic materials 0.000 abstract description 3
- 239000004065 semiconductor Substances 0.000 abstract description 3
- PBCFLUZVCVVTBY-UHFFFAOYSA-N tantalum pentoxide Inorganic materials O=[Ta](=O)O[Ta](=O)=O PBCFLUZVCVVTBY-UHFFFAOYSA-N 0.000 abstract description 3
- 239000011521 glass Substances 0.000 abstract description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 2
- MUBZPKHOEPUJKR-UHFFFAOYSA-N Oxalic acid Chemical compound OC(=O)C(O)=O MUBZPKHOEPUJKR-UHFFFAOYSA-N 0.000 abstract 3
- 239000000463 material Substances 0.000 abstract 3
- 235000006408 oxalic acid Nutrition 0.000 abstract 1
- 239000010453 quartz Substances 0.000 abstract 1
- 230000003647 oxidation Effects 0.000 description 7
- 238000007254 oxidation reaction Methods 0.000 description 7
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 239000011651 chromium Substances 0.000 description 2
- 239000007772 electrode material Substances 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 230000003340 mental effect Effects 0.000 description 2
- 229910001120 nichrome Inorganic materials 0.000 description 2
- 229910052715 tantalum Inorganic materials 0.000 description 2
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 239000012153 distilled water Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005566 electron beam evaporation Methods 0.000 description 1
- 238000001017 electron-beam sputter deposition Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- QGLKJKCYBOYXKC-UHFFFAOYSA-N nonaoxidotritungsten Chemical compound O=[W]1(=O)O[W](=O)(=O)O[W](=O)(=O)O1 QGLKJKCYBOYXKC-UHFFFAOYSA-N 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 229910001930 tungsten oxide Inorganic materials 0.000 description 1
- 238000001771 vacuum deposition Methods 0.000 description 1
- 230000002747 voluntary effect Effects 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78636—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with supplementary region or layer for improving the flatness of the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は薄膜トラン２スタ（以下ＴＰＴと略す）の製造
方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for manufacturing a thin film transistor (hereinafter abbreviated as TPT).
（従来の技術）
ＴＰＴは一般に、例えば特開昭５８−３２４６８号公報
に示されているように、基板上に直接ゲート電極を形成
した構造となっている。このようなＴＰＴを製造する場
合には、通常、まずガラス基板又はアルミナ基板上に、
ニクロム（ＮｉＣｒ ） 、タングステン（Ｗ）、モリ
ブデン（Ｍｏ ） 、クロム（Ｃｒ ）等よりなるゲー
ト電極金属層を電子ビーム蒸着法またはスパッタ法によ
シ被着形成し、所定のパターンに加工してケゝ−ト電極
を形成する。次いで、その上にゲート絶縁層となるンリ
コン酸化（５ｉｎＸ）膜またはシリコン窒化（５ｉＮｘ
）膜をそれぞれ、Ｎ２０と５ｉＨ４ｒ ＮＨ５とＳ Ｉ
Ｈ４を主成分ガ゛スとしてグロー放電法により堆積させ
、さらにチャンネル層（活性層）となる、非晶質７リコ
ン半導体層をＳ ＩＨ４のグロー放電法によシ堆積させ
る。(Prior Art) TPT generally has a structure in which a gate electrode is formed directly on a substrate, as shown in, for example, Japanese Patent Laid-Open No. 58-32468. When manufacturing such TPT, usually, first, on a glass substrate or alumina substrate,
A gate electrode metal layer made of nichrome (NiCr), tungsten (W), molybdenum (Mo), chromium (Cr), etc. is deposited by electron beam evaporation or sputtering, and processed into a predetermined pattern. Form a second electrode. Next, a silicon oxide (5inX) film or a silicon nitride (5inX) film is formed on it to become a gate insulating layer.
) membranes, respectively, N20 and 5iH4r NH5 and S I
H4 is deposited as a main component gas by a glow discharge method, and an amorphous 7-licon semiconductor layer, which will become a channel layer (active layer), is further deposited by a SIH4 glow discharge method.
さらに、低抵抗非晶質／リコン層となるｒ層を主成分ガ
スのＳ ＩＨ４中へ０．］〜１．０％程度のＰＨ３を混
合してグロー放電法によって堆積する。Furthermore, the r-layer, which will become a low-resistance amorphous/recon layer, is immersed into the main component gas SIH4. ]~1.0% of PH3 is mixed and deposited by glow discharge method.
次にＴＰＴとなる部分以外は加工し除去して、島状にパ
ターンニングしゲート絶縁層とチャンネル層を形成する
。Next, the portion other than the portion that will become the TPT is processed and removed and patterned into an island shape to form a gate insulating layer and a channel layer.
次に、ソース電極、ドレイン電極となるアルミ（Ａｔ）
層を真空蒸着法と加工によシ形成する。Next, aluminum (At) will be used as the source and drain electrodes.
The layer is formed by vacuum deposition and processing.
（発明が解決しようとする問題点）
しかしながら、このような製法ではゲート電極による段
差のためゲート電極とノース１翫、またはゲート電極と
ドレイン電極間のリークが発生しやすいので、ゲート絶
縁膜を厚くする必要があった。(Problem to be solved by the invention) However, in this manufacturing method, leakage easily occurs between the gate electrode and the north electrode or between the gate electrode and the drain electrode due to the step difference caused by the gate electrode, so the gate insulating film is made thicker. I needed to.
本発明の目的は、ゲート電極での段差を解消することに
よって、信頼性の高いＴＦＴを歩留９良く製造すること
にある。 □
（問題点を解決するための手段〕
本発明は、まず基板要部全表面にゲート電極材としての
金属を被着し、次いで、その金属層をゲート電極予定領
域を除いて酸化することによってゲート電極を形成し、
その後ゲート酸化膜、半導体薄膜層を被着し、またソー
ス電極及びドレイン電極を形成するようにしたものであ
る。An object of the present invention is to manufacture a highly reliable TFT with a high yield of 9 by eliminating the step difference in the gate electrode. □ (Means for solving the problem) The present invention first deposits a metal as a gate electrode material on the entire surface of the main part of the substrate, and then oxidizes the metal layer except for the area where the gate electrode is planned. forming a gate electrode;
After that, a gate oxide film and a semiconductor thin film layer are deposited, and a source electrode and a drain electrode are formed.
（作用）
このように、ゲート電極となる部分以外を酸化すること
によってゲート電極を選択的に形成しているため、段差
のない構造となシ、比較的薄いゲート酸化膜で、ゲート
電極とソース電極間のリーク電流などをおさえることが
でき、信頼性を高めることができる。(Function) In this way, since the gate electrode is selectively formed by oxidizing the part other than the part that will become the gate electrode, a structure with no steps is created, and a relatively thin gate oxide film is used to form the gate electrode and the source. Leakage current between electrodes can be suppressed, and reliability can be improved.
（実施例）
１ず、ガラス基板または石英基板１上の要部全面に、電
子ビーム蒸着法あるいはスパッタ法によりメンタル（Ｔ
ａ）膜を１００〜１０００λ被着形成する。(Example) 1. First, a mental (T
a) Depositing a film with a thickness of 100 to 1000λ.
その後、レノスト等でゲート電極となる部分のみをおお
ったパターンニング加工を行い、そののち蒸留水にし乃
う酸を添加した溶液中に入れ、メンタル側を陽極として
数十〜数百ボルトの直流電圧を印加することで陽極酸化
（化成）を行ない、露出したタンタル部分全体を五酸化
タンタル（Ｔａ２０５）とし絶縁層２とする。After that, a patterning process is performed to cover only the part that will become the gate electrode using Lennost, etc., and then it is placed in a solution of distilled water and acid added, and a DC voltage of several tens to hundreds of volts is applied with the mental side as the anode. is applied to perform anodic oxidation (chemical conversion), and the entire exposed tantalum portion is converted into tantalum pentoxide (Ta205) to form the insulating layer 2.
その後、不用となったレノスト等を除去することで、所
定のパターンに形成されたｒ−）電極３が形成される。Thereafter, the r-) electrode 3 formed in a predetermined pattern is formed by removing unnecessary renost and the like.
その後、通例の方法に従って、ゲート絶縁層３、チャン
ネル層４、低抵抗非晶質ンリコン膜５、ノース電極６、
ドレイン電極７を形成することでＴＰＴが完成する。Thereafter, according to the usual method, a gate insulating layer 3, a channel layer 4, a low resistance amorphous silicon film 5, a north electrode 6,
The TPT is completed by forming the drain electrode 7.
ゲート金属の酸化法としては、陽翫酸化法のほかに、０
□プラズマによるプラズマ酸化法を用いても同様のこと
が可能である。In addition to the positive oxidation method, gate metal oxidation methods include
□The same thing can be done using a plasma oxidation method using plasma.
またケ゛〜ト電極金属とし７てタンタルを用いたが、チ
タン（Ｔｉ ）または、アルミニウム（Ａｔ）またはり
／ゲステン（Ｗ）をゲート電極の材料として用い、不用
の部分をそれぞれ陽甑酸化寸たはプラズマ酸化して、そ
れぞれチタン酸化物層（ＴｌＯ２）、アルミニウム酸化
物層（Ａｔ２０３）、タングステン酸化物層（罰、）を
形成しても同様にＴＰＴが完成する。In addition, although tantalum was used as the gate electrode metal 7, titanium (Ti), aluminum (At), or oxide/gesten (W) was used as the gate electrode material, and the unnecessary portions were anodic oxidized. TPT is similarly completed by plasma oxidation to form a titanium oxide layer (TlO2), an aluminum oxide layer (At203), and a tungsten oxide layer (TlO2), respectively.
（発明の効果）
以上のように本発明によれば、ゲート電極形成時に陽極
酸化またはプラズマ酸化を行ない不用のケ゛−Ｖ電極部
分を酸化し絶縁物化したことにょシ、ゲート電極の膜厚
による段差のない平坦なゲート電極が形成可能となった
。したがって、ゲート電極とノース電極、ゲート電極と
ドレイン電極間のリーク電流を微少におさえることが可
能となった。(Effects of the Invention) As described above, according to the present invention, by performing anodic oxidation or plasma oxidation at the time of forming the gate electrode to oxidize the unnecessary C-V electrode portion and make it an insulator, the step difference due to the film thickness of the gate electrode can be reduced. It is now possible to form a flat gate electrode without any cracks. Therefore, it has become possible to suppress leakage current between the gate electrode and the north electrode, and between the gate electrode and the drain electrode to a minimum.
またこの作成法によれば高価な装置は必要なく、通常の
工程で製造できるため安価となる。Furthermore, this manufacturing method does not require expensive equipment and can be manufactured using normal processes, resulting in low cost.
また、ステ、メカパレーノが問題にならないため、高い
信頼性が期待される。In addition, high reliability is expected as there are no problems with the steering or mechanical systems.
図は本発明によって得られたＴＰＴの一例を示す断面図
である。
１・・・絶縁物基板、２・・・絶縁層、３・・・デート
絶縁層、４・・・チャンネル層、５・・低抵抗非晶質シ
リコン層、６・・・ノース電極、７・・ドレイン電極。
特許出願人 沖電気工業株式会社
手続補正書（自発）
ｌ 事件の表示
昭和５９年 特 許 頚第２０４１１３号２ 発明の名
称
薄膜トランノスタの製造方法
３ 補正をする者
事件との関係 特 許 出 願 人生 所（
〒１０５） 東京都港区虎ノ門１丁目７番１２号５
補正の対象 明細書中「発明の詳Ｍｆｉな説明」の欄、
６ 補正の内容
１４ 明細書第４頁第１５行目から第１７行目に［ケ
ゝ−ト絶録層３、チャンネル層４、・・・・・ドレイン
電極７を」とちるのを下記の通り補正する。
「ゲート絶縁層４、チャンネル層５、低抵抗非晶質／リ
コン膜６、ソース電極７、ドレイン電極８７４Ｊ
２、同書第６頁第５行目から第７行目に「３・・・ゲー
ト絶、縁・ ７・・・ドレイン電極。」とあるのを下
記の通り補正する。
「 ３ ・ ケゝ−ト 電極層、 ４ ・・・ケ８−
ト 絶縁層、 、５・・チャンネル層、６・・・低抵抗
非晶質７９７７層、７・・ソース電極、８・・・ドレイ
ン電極。」３ 図を別紙の通り補正する。The figure is a sectional view showing an example of TPT obtained by the present invention. DESCRIPTION OF SYMBOLS 1... Insulator substrate, 2... Insulating layer, 3... Date insulating layer, 4... Channel layer, 5... Low resistance amorphous silicon layer, 6... North electrode, 7...・Drain electrode. Patent applicant Oki Electric Industry Co., Ltd. Procedural amendment (voluntary) l Indication of the case 1982 Patent No. 204113 2 Name of the invention Method for manufacturing thin film transnostar 3 Relationship with the case by the person making the amendment Patent application Life Place (
105) 1-7-12-5 Toranomon, Minato-ku, Tokyo
Subject of amendment: “Detailed description of the invention” column in the specification;
6 Contents of amendment 14 The text “[Kate isolation layer 3, channel layer 4, . . . drain electrode 7]” in lines 15 to 17 of page 4 of the specification has been changed as follows. to correct. "Gate insulating layer 4, channel layer 5, low resistance amorphous/licon film 6, source electrode 7, drain electrode 874J 2," in the same book, page 6, lines 5 to 7, "3...gate disconnection" , edge 7...drain electrode.'' should be corrected as follows. 3. Kate electrode layer, 4...ke8-
Insulating layer, 5...Channel layer, 6...Low resistance amorphous 7977 layer, 7...Source electrode, 8...Drain electrode. ”3 Correct the figure as shown in the attached sheet.
Claims (1)
でゲート電極となる部分以外を酸化することによってゲ
ート電極を選択的に形成したことを特徴とする薄膜トラ
ンジスタの製造方法。1. A method for manufacturing a thin film transistor, comprising forming a metal layer to serve as a gate electrode on the surface of a substrate, and then selectively forming a gate electrode by oxidizing a portion other than the portion to become the gate electrode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20411384A JPS6184065A (en) | 1984-10-01 | 1984-10-01 | Manufacture of thin film transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20411384A JPS6184065A (en) | 1984-10-01 | 1984-10-01 | Manufacture of thin film transistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6184065A true JPS6184065A (en) | 1986-04-28 |
Family
ID=16485020
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20411384A Pending JPS6184065A (en) | 1984-10-01 | 1984-10-01 | Manufacture of thin film transistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6184065A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02113580A (en) * | 1988-10-21 | 1990-04-25 | Nec Corp | Thin film circuit |
| JPH047876A (en) * | 1990-04-25 | 1992-01-13 | Nec Corp | Thin film transistor |
| EP0506117A2 (en) * | 1991-03-29 | 1992-09-30 | Casio Computer Company Limited | Thin-film transistor |
| JP2000353791A (en) * | 1999-05-17 | 2000-12-19 | Motorola Inc | Magnetic random access memory and manufacture thereof |
| US6559341B2 (en) | 1997-11-25 | 2003-05-06 | Nihon Nohyaku Co., Ltd. | Phthalic acid diamide derivatives, fluorine-containing aniline compounds as starting material, agricultural and horticultural insecticides, and a method for application of the insecticides |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51150986A (en) * | 1975-06-19 | 1976-12-24 | Mitsubishi Electric Corp | Fabrication method of semiconductor device |
| JPS5721867A (en) * | 1980-06-02 | 1982-02-04 | Xerox Corp | Planar thin film transistor array and method of producing same |
| JPS58124228A (en) * | 1982-01-21 | 1983-07-23 | Nec Corp | Manufacture of semiconductor device |
| JPS58201364A (en) * | 1982-05-20 | 1983-11-24 | Matsushita Electric Ind Co Ltd | Semiconductor device and manufacture thereof |
| JPS5994438A (en) * | 1982-11-19 | 1984-05-31 | Tdk Corp | Forming method of patterned aluminum layer |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51150986A (en) * | 1975-06-19 | 1976-12-24 | Mitsubishi Electric Corp | Fabrication method of semiconductor device |
| JPS5721867A (en) * | 1980-06-02 | 1982-02-04 | Xerox Corp | Planar thin film transistor array and method of producing same |
| JPS58124228A (en) * | 1982-01-21 | 1983-07-23 | Nec Corp | Manufacture of semiconductor device |
| JPS58201364A (en) * | 1982-05-20 | 1983-11-24 | Matsushita Electric Ind Co Ltd | Semiconductor device and manufacture thereof |
| JPS5994438A (en) * | 1982-11-19 | 1984-05-31 | Tdk Corp | Forming method of patterned aluminum layer |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02113580A (en) * | 1988-10-21 | 1990-04-25 | Nec Corp | Thin film circuit |
| JPH047876A (en) * | 1990-04-25 | 1992-01-13 | Nec Corp | Thin film transistor |
| EP0506117A2 (en) * | 1991-03-29 | 1992-09-30 | Casio Computer Company Limited | Thin-film transistor |
| EP0506117A3 (en) * | 1991-03-29 | 1995-09-27 | Casio Computer Co Ltd | Thin-film transistor |
| US6559341B2 (en) | 1997-11-25 | 2003-05-06 | Nihon Nohyaku Co., Ltd. | Phthalic acid diamide derivatives, fluorine-containing aniline compounds as starting material, agricultural and horticultural insecticides, and a method for application of the insecticides |
| JP2000353791A (en) * | 1999-05-17 | 2000-12-19 | Motorola Inc | Magnetic random access memory and manufacture thereof |
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