JPH0548101A - Manufactur eof thin transistor - Google Patents

Abstract

PURPOSE:To surely prevent the occurrence of short circuits between a gate electrode and source and drain electrodes by depositing a gate insulating film to a uniform thickness and securing the dielectric strength of the gate insulating film at a sufficiently high level near the side edges of the gate electrode. CONSTITUTION:After a base insulating film 2 is formed on a substrate 1 except a gate electrode forming area A, a metallic film 3 is formed on the substrate 1 and a gate electrode 3a is formed in the area A by etching the film 3. Then oxidized insulating layers 3b1 and 3b2 are formed by successively anodizing the side faces and upper surface of the electrode 3a. Thereafter, a gate insulating film 4 is formed on the surface of the electrode 3a after filling up the gaps between the side faces of the electrode 3a and base insulating film 2 and leveling the surface of the electrode 3a (surface of the layer 3b2) with that of the film 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a thin film transistor.

[0002]

2. Description of the Related Art Thin film transistors are used, for example, as active elements of active matrix liquid crystal display elements.

In this thin film transistor, a gate electrode is formed on an insulating substrate made of glass or the like, a gate insulating film is formed thereon, and a semiconductor layer and source / drain electrodes are formed on this gate insulating film. Is manufactured by the method.

[0004]

By the way, the gate insulating film of the above-mentioned thin film transistor is generally formed by the plasma CVD method. In this case, however, since the gate electrode is formed on the substrate, the gate insulating film is formed on the substrate. When the gate insulating film is formed, the deposited thickness becomes extremely thin in the step portion between the substrate and the gate electrode, so that the withstand voltage of the gate insulating film near the side edge of the gate electrode deteriorates, A short circuit may occur between the gate electrode and the source / drain electrodes.

An object of the present invention is to deposit the gate insulating film to a uniform thickness when forming the gate insulating film after forming the gate electrode on the substrate, and to form the gate insulating film near the side edges of the gate electrode. It is an object of the present invention to provide a method for manufacturing a thin film transistor, which can sufficiently secure the dielectric strength and can surely prevent a short circuit from occurring between the gate electrode and the source / drain electrodes.

[0006]

A method of manufacturing a thin film transistor according to the present invention comprises a step of forming a base insulating film on an insulating substrate except for a gate electrode forming region, and a step of forming the base insulating film and the gate electrode of the substrate. In the gate electrode formation region, a step of forming a metal film having a thickness smaller than that of the base insulating film on the region, and forming a resist mask on the metal film and etching the metal film. A step of forming a gate electrode made of the metal film, and a side surface of the gate electrode is anodized while leaving the resist mask, and the side surface of the gate electrode is oxidized to a thickness in contact with the side surface of the base insulating film. The step of forming an insulating layer, the resist mask is removed, and then the upper surface of the gate electrode is anodized so that the surface of the gate electrode is flush with the surface of the base insulating film. Forming an oxide insulating layer to a thickness, forming a gate insulating film on the oxide insulating layer on the gate electrode and the underlying insulating film, and forming a semiconductor layer and source / drain electrodes thereon It is characterized by comprising steps.

[0007]

That is, according to the present invention, the base insulating film is formed on the substrate except the gate electrode formation region, and the gate electrode is formed in the gate electrode formation region by forming a metal film and etching the metal film. By sequentially anodizing the side surface and the upper surface of the gate electrode to generate an oxide insulating layer, the gap between the side surface of the gate electrode and the side surface of the base insulating film is eliminated, and the surface of the gate electrode (oxide insulating layer Surface of the base insulating film is flush with the surface of the base insulating film, the film forming surface of the gate insulating film is a flat surface without steps, and the gate insulating film is formed thereon.

The reason why the surface on which the gate insulating film is formed can be made flat without any step is that the volume of the metal increases when it is oxidized, and when the side surface of the gate electrode is anodized, this electrode is formed. The width of the gate electrode including the oxide insulating layer formed on the side surface is widened, so that there is no gap between the side surface of the gate electrode and the side surface of the base insulating film. Further, when the upper surface of the gate electrode is oxidized, the film thickness of the gate electrode including the oxide insulating layer formed on the gate electrode becomes thicker, so the gate electrode is formed to a thickness smaller than that of the base insulating film. If the upper surface of the gate insulating film is anodized until the surface of the oxide insulating layer to be formed is flush with the surface of the base insulating film, the film surface of the gate insulating film to be formed thereafter is a flat surface without steps. become.

If the gate insulating film deposition surface is a flat surface without steps, the gate insulating film is deposited to a uniform thickness when the gate insulating film is deposited.
The withstand voltage of the gate insulating film near the side edge of the gate electrode is also sufficient.

Further, according to the present invention, the insulating layer on the gate electrode is a two-layer film including the oxide insulating layer formed on the gate electrode and the gate insulating film formed on the oxide insulating layer. The withstand voltage between the gate electrode and the source / drain electrodes is further increased.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below by taking as an example the manufacture of a thin film transistor which is an active element of an active matrix liquid crystal display element.

FIG. 1 is a manufacturing process diagram of a thin film transistor, showing a manufacturing process of an inverse stagger type thin film transistor here. This thin film transistor is manufactured as follows.

[Step 1] First, as shown in FIG. 1A, a gate electrode formation region (a formation region of a gate electrode and its wiring portion) A is formed on a transparent insulating substrate 1 made of glass or the like. Except for this, the base insulating film 2 is formed.

As the base insulating film 2, a Si N (silicon nitride) film is formed on almost the entire surface of the substrate 1 by the plasma CVD method, and a portion of the Si N film corresponding to the gate electrode forming region A is removed by etching. To form. The base insulating film 2 is formed to have a film thickness (for example, about 500 nm) that is sufficiently thicker than the thickness of the gate electrode formed on the substrate 1.

[Step 2] Next, as shown in FIG. 1B, the base insulating film 2 is formed on the base insulating film 2 and the gate electrode forming region A of the substrate 1 by a sputtering method.
Thickness (about 400n)
The metal film 3 is formed in m). In addition, the metal film 3 has
A metal such as Cr, Ta, Ta-Mo alloy, Al or Ti-containing Al in which a trace amount of Ti is contained in Al is used.

[Step 3] Next, as shown in FIG. 1B, the shape of the gate electrode formed on the gate electrode formation region A of the substrate 1 on the metal film 3 and the wiring portion thereof. A resist mask M having a pattern corresponding to the pattern is formed, and the metal film 3 is etched, and as shown in FIG.
In the upper gate electrode formation region A, the gate electrode 3a made of the metal film 3 and its wiring portion (not shown) are formed.

In this case, the resist mask M is formed to have a width slightly smaller than the width of the gate electrode formation region A in consideration of the formation error. If the resist mask M is formed to have such a width, the gate electrode 3a and its wiring portion (hereinafter, including the wiring portion will be referred to as a gate electrode) are formed in the gate electrode formation region A even when the formation position of the resist mask M is deviated. Since the gate electrode 3a can be formed only inside, the side edge portion of the gate electrode 3a does not overlap with the underlying insulating film 2 and does not project onto the underlying insulating film 2.

[Step 4] As shown in FIG. 1D, the side surface of the gate electrode 3a is anodized while leaving the resist mask M on the gate electrode 3a. Oxide insulating layer 3 having a thickness in contact with the side surface of film 2
Generate b1.

In this anodic oxidation of the gate electrode 3a, only the resist mask M on the end of the wiring portion is partially removed, and the end of the wiring portion is made into an anode of the DC power source by a clip type connector or the like. After connecting, the substrate 1 is immersed in an electrolytic solution (for example, an ammonium borate solution when the gate electrode 3a is an Al film or a Ti-containing Al film) and the gate electrode 3a
Is opposed to the counter electrode (cathode) arranged in the electrolytic solution, and a voltage is applied between the gate electrode 3a and the counter electrode.

In this way, in the electrolytic solution, the gate electrode 3
When a voltage is applied between a and the counter electrode, the side surface of the gate electrode 3a, which is the anode, in contact with the electrolytic solution undergoes a chemical conversion reaction and is anodized. Then, when the metal is oxidized, the volume thereof is increased. Therefore, when the side surface of the gate electrode 3a is anodized as described above, the width of the gate electrode including the oxide insulating layer 3b1 generated on the side surface of the electrode is widened and the gate electrode 3a is expanded. There is no gap between the side surface of the underside and the side surface of the base insulating film 2.

The generated thickness of the oxide insulating layer 3b1 is basically determined by the applied voltage. However, when the oxide insulating layer 3b1 grows and there is no gap between the oxide insulating layer 3b1 and the side surface of the base insulating film 2, the gate electrode 3a is formed. Since the non-oxidized surface of will not touch the electrolyte,
At this point, the progress of oxidation stops regardless of the applied voltage.

The gap between the side surface of the gate electrode 3a and the side surface of the underlying insulating film 2 is such that the gate electrode 3a is misaligned due to the formation error of the resist mask M and the side surface of the gate electrode 3a is etched. Because it depends on
The oxide insulating layer 3b1 generated on each side surface of the gate electrode 3a does not always contact the side surface of the base insulating film 2 at the same time, but the oxide insulating layer 3a does not grow on the side surface of the base insulating film 2 where it does not grow. Since the electrolytic solution is in contact, if the voltage is continuously applied for a certain period of time, the oxide insulating layer 3b1 in this portion also grows until it comes into contact with the side surface of the base insulating film 2, so that finally each side surface of the gate electrode 3a is formed. The gaps between all the points and the side surface of the base insulating film 2 are completely eliminated.

[Step 5] Next, as shown in FIG. 1E, the resist mask M on the gate electrode 3a is completely removed, and thereafter, the gate electrode 3a is processed in the same manner as the anodic oxidation of the side surface of the electrode. The upper surface of the gate electrode 3 is anodized to form an oxide insulating layer 3b2 on the gate electrode 3a.

When the upper surface of the gate electrode 3a is anodized in this manner, the deposition of an oxidized region on the upper surface of the gate electrode 3a increases, and the film thickness of the gate electrode 3a including the oxide insulating layer 3b2 increases.

The anodic oxidation of the upper surface of the gate electrode 3a is
The surface of the oxide insulating layer 3b2 formed on the electrode is the base insulating film 2.
Repeat until the surface is flush with. Since the thickness of the oxide insulating layer 3b2 generated depends on the applied voltage as described above, an oxidation test is performed in advance to find an appropriate applied voltage value, and if the applied voltage is controlled to this value, the gate electrode The oxide insulating layer 3b2 can be formed on the surface 3a to a thickness such that the surface thereof is flush with the surface of the base insulating film 2.

When the upper surface of the gate electrode 3a is anodized in this manner, the surface of the oxide insulating layer 3b2 on the gate electrode 3a and the surface of the base insulating film 2 become a flat surface having no step.

[Step 6] Next, as shown in FIG. 1F, the oxide insulating layer 3 formed on the gate electrode 3a.
A gate insulating film 4 made of SiN is formed on b2 and the base insulating film 2, and an i-type semiconductor layer 5 made of a-Si (amorphous silicon) is formed on the gate insulating film 4, and the i-type semiconductor layer is formed. 5, a blocking insulating film 6 made of SiN is formed on the channel region 5, and an n-type semiconductor layer 7 made of a-Si doped with an impurity is formed on both sides of the i-type semiconductor layer 5. The source electrode 8, the drain electrode 9 and the wiring portion thereof are formed to complete the thin film transistor.

Incidentally, in these, the gate insulating film 4, the i-type semiconductor layer 5, and the blocking insulating film 6 are continuously formed by the plasma CVD method, and the blocking insulating film 6 and the i-type semiconductor layer 5 are sequentially patterned. After that, the n-type semiconductor layer 7
Is formed by a plasma CVD method, and a metal film (for example, a Cr film) is formed thereon by a sputtering method. The metal film and the n-type semiconductor layer 7 thereunder are formed as source and drain electrodes 8 and 9. It is formed by a method of patterning in the shape of.

Further, in FIG. 1F, 10 is a pixel electrode formed on the gate insulating film 4, and the pixel electrode 10 is connected to the source electrode 8 of the thin film transistor. The pixel electrode 10 is formed by forming a transparent conductive film such as ITO and patterning the transparent conductive film.

According to the method of manufacturing a thin film transistor, when the gate insulating film 4 is formed on the substrate 1 after the gate electrode 3 is formed, the gate insulating film 4 can be deposited to a uniform thickness.

That is, in the above manufacturing method, the base insulating film 2 is formed on the substrate 1 except the gate electrode forming region A, and the metal film 3 is formed and etched to form the gate electrode forming region A in the gate electrode forming region A. After forming the gate electrode 3a,
The side surface and the upper surface of the gate electrode 3a are sequentially anodized to generate the oxide insulating layers 3b1 and 3b2, so that the gap between the side surface of the gate electrode 3a and the side surface of the base insulating film 2 is eliminated and the gate electrode 3a is formed. Surface (oxidation insulation layer 3
The surface b2) is flush with the surface of the base insulating film 2, and the film forming surface of the gate insulating film 4 is a flat surface without steps.

If the gate insulating film 4 has a flat surface without steps, the gate insulating film 4 is deposited to a uniform thickness when the gate insulating film 4 is formed. The withstand voltage of the gate insulating film 4 near the side edge of the gate electrode 3a is also sufficient.

In addition, when a thin film transistor is manufactured by the above manufacturing method, the insulating layer on the gate electrode 3a includes the oxide insulating layer 3b2 formed on the gate electrode 3a and the gate insulating film 4 formed on the oxide insulating layer 3b2. Since it is a two-layer film, the withstand voltage between the gate electrode 3a and the source / drain electrodes 8 and 9 is further increased.

Therefore, according to the above-mentioned manufacturing method, the dielectric strength of the gate insulating film 4 near the side edge of the gate electrode 3a is sufficiently ensured, and the gate electrode 3a and the source / drain electrodes 8 and 9 are short-circuited. It is possible to reliably prevent the generation of the thin film transistor and to manufacture a highly reliable thin film transistor.

Although the manufacturing of the inverted stagger type thin film transistor has been described in the above embodiment, the present invention manufactures the inverted coplanar type thin film transistor in which the source and drain electrodes are formed between the gate insulating film and the i type semiconductor layer. Can also be applied to.

[0036]

According to the present invention, when the gate insulating film is formed after the gate electrode is formed on the substrate, the gate insulating film is deposited to a uniform thickness so that the gate insulating film near the side edge of the gate electrode is formed. The dielectric strength of the film can be sufficiently ensured, and the occurrence of a short circuit between the gate electrode and the source / drain electrodes can be reliably prevented.

[Brief description of drawings]

FIG. 1 is a manufacturing process diagram of a thin film transistor showing an embodiment of the present invention.

[Explanation of symbols]

1 ... Substrate, A ... Gate electrode forming region, 2 ... Base insulating film,
3 ... Metal film, 3a ... Gate electrode, 3b1, 3b2 ... Oxidation insulating layer, 4 ... Gate insulating film, 5 ... i-type semiconductor layer, 6 ... Blocking insulating film, 7 ... N-type semiconductor layer, 8 ... Source electrode, 9
... Drain electrode, 10 ... Pixel electrode, M ... Resist mask.

Claims (1)

[Claims] 1. A step of forming a base insulating film on an insulating substrate except a gate electrode forming region, and a film thickness of the base insulating film thinner than the base insulating film and the gate electrode forming region of the substrate. Forming a metal film to a thickness, forming a resist mask on the metal film and etching the metal film, and forming a gate electrode made of the metal film in the gate electrode formation region. A step of anodizing the side surface of the gate electrode while leaving the resist mask, and forming an oxide insulating layer on the side surface of the gate electrode to a thickness in contact with the side surface of the base insulating film, and removing the resist mask And thereafter, anodizing the upper surface of the gate electrode to form an oxide insulating layer on the gate electrode to a thickness such that the surface is flush with the surface of the base insulating film, Electric Method of manufacturing the thin film transistor gate insulating film is formed, and wherein the semiconductor layer and the source thereon, and forming a drain electrode, that consists on the oxide insulating layer and the underlying insulating film on the.