JPH0815733A - Thin film transistor panel and its production - Google Patents

Abstract

PURPOSE:To provide a production method of a thin film transistor panel by which a TFT panel is produced with high accuracy in a simple process. CONSTITUTION:After a thin film transistor array is formed on a transparent substrate 11, a transparent conductive film 37 to form a pixel electrode 15 and a metallic layer to form a drain line 19 are successively formed. The metallic layer is patterned into the pixel electrode 15 and the drain line 19, and the metallic layer remaining is used as a mask for patterning of the transparent conductive film 37. As for the metallic layer remaining, the layer on the surface of the drain line 19 is anodically oxidized. The metallic layer 45 on the pixel electrode 15 is removed by etching while the drain line 19 is protected by the anodically oxidized film 47.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a thin film transistor panel.

[0002]

2. Description of the Related Art A thin film transistor panel (TFT panel) for a liquid crystal display device has a transparent substrate 1 as shown in FIG.
A large number of thin film transistors (TFTs) 113, pixel electrodes 115, gate lines 117, drain lines (data lines) 119, etc. are arranged in a matrix on the substrate 11. Further, in the TFT panel, in order to prevent dielectric breakdown of the gate insulating film due to static electricity, a short bar 121 is arranged at the edge of the transparent substrate 111.
The gate line 117 and the drain line 119 are short-circuited, and the portion indicated by the broken line in FIG. 8 is cut at the final stage of the manufacturing process to separate the gate line 117 and the drain line 119.

A method of manufacturing a transistor panel having such a structure will be described with reference to FIGS. 8 to 10B. First, a metal layer is formed on the transparent substrate 111 and patterned to form the gate electrode GE and the gate line 1.
17, the short bar 121, the gate pad 123, and the drain pad 125 are formed. Next, for insulation protection,
Gate electrode GE and gate line 11 by anodic oxidation
7, the surfaces of the short bar 121, the gate pad 123, and the drain pad 125 are oxidized to form an oxide film 127. Next, the gate pad 123 and the drain pad 12
The oxide film on the surface of 5 is peeled off.

A gate insulating film GI made of silicon oxide or the like is formed on the entire surface of the substrate. An intrinsic semiconductor layer (i-Si) SI is formed on the gate insulating film GI. Intrinsic semiconductor layer SI
A silicon nitride layer is formed thereover, and this is patterned to form a blocking layer BL for protecting the channel region of the TFT 113 from etching or the like. Next, an n-type semiconductor layer is formed on the entire surface of the substrate, and a metal layer of chromium or the like is further formed thereon. Next, these layers are patterned to form a source electrode SE and a drain electrode DE, and further, the intrinsic semiconductor layer SI is patterned into an element shape. Through the above steps, the structure shown in FIG. 9A is obtained.

Next, by sputtering or the like, ITO
A film of (oxide of indium and tin) is formed on the entire surface of the substrate and is patterned to form a pixel electrode 115, as shown in FIG. 9B. Next, the gate insulating film G
A portion of I on the drain pad 125 is removed, and a contact hole 129 for connecting the drain pad 125 and the drain line 119 is formed as shown in FIG.

Next, a metal layer is formed on the entire surface of the substrate, and this metal layer is patterned, as shown in FIG.
The drain line 119 is formed. At this time, the contact hole 129 is also filled with metal, and the drain line 119 is formed.
Are connected to the drain pad 125.

Finally, the overcoat layer 13 is formed on the entire surface of the substrate.
1 to form the gate pad 123 and the drain pad 12
8 is etched to form the overcoat layer 131 on FIG.
Then, as shown in FIG. 10B, the metal layer on the gate pad 123 and the drain pad 125 is exposed.

After the manufacture of the TFT panel is completed, the transparent substrate 11
1 is cut along the broken line in FIG.
21 are removed, and the gate line 117 and the drain line 1 are removed.
19 is electrically separated to complete the manufacture of the TFT panel.

[0009]

In the above manufacturing method,
A separate mask (patterning mask) is required for each manufacturing process. Therefore, there are problems that the number of masks is large, the manufacturing process is complicated, and the mask alignment error is large.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a thin film transistor panel that can be manufactured using a small number of masks and a manufacturing method thereof. Another object of the present invention is to provide a thin film transistor panel and a method for manufacturing the same that can be manufactured with high accuracy by a simple process.

[0011]

In order to achieve the above object, a method of manufacturing a thin film transistor panel of the present invention comprises:
Substrate, a plurality of thin film transistors formed in a matrix on the substrate, a plurality of gate lines connected to the gate of the corresponding thin film transistor, a plurality of pixel electrodes connected to one end of the current path of the corresponding thin film transistor,
In a method of manufacturing a thin film transistor panel including a plurality of data lines connected to the other end of the current path of a corresponding thin film transistor, a transparent conductive film for forming pixel electrodes and a metal layer for forming data lines are continuously formed. A step of patterning the metal layer into the shape of the pixel electrode and the data line, a step of patterning the transparent conductive film using the remaining metal layer as a mask, and the remaining metal layer And oxidizing the surface of the data line forming portion to form an oxide film, and removing the metal layer on the pixel electrode while protecting the data line forming portion with the oxide film. Is characterized by.

The thin film transistor panel of the present invention includes a substrate, a plurality of thin film transistors formed in a matrix on the substrate, a plurality of gate lines connected to the gates of the corresponding thin film transistors, and a current path of the corresponding thin film transistors. A plurality of pixel electrodes connected to one end of the transparent conductive material, and a plurality of data lines connected to the other end of the current path of the corresponding thin film transistor, each data line being the transparent conductive material. 1. A thin film transistor panel, comprising: a first conductive layer composed of the above-mentioned; and a second conductive layer formed on the first conductive layer and made of a metal whose surface is oxidized.

[0013]

According to the manufacturing method of the above structure, the transparent conductive film for forming the pixel electrode and the metal layer for forming the data line are continuously formed, and the metal layer is patterned into the shapes of the pixel electrode and the data line. Then, the transparent conductive film is patterned using the remaining metal layer as a mask. Therefore, the data line and the pixel electrode can be formed using the same patterning mask. Also,
Since it is not necessary to consider the mask alignment error, the data line and the pixel electrode can be sufficiently close to each other, and the size of the pixel electrode can be increased. The metal layer on the pixel electrode is an isolated pattern and is insulated from the data line. Therefore, if a voltage is applied to the data line and the surface thereof is oxidized by the anodic oxidation method, only the necessary portion can be oxidized with a simple structure.

Further, according to the thin film transistor panel having the above structure, it is possible to manufacture with a small number of masks by using the above manufacturing method. Further, since the data line has a laminated structure of the first conductive layer and the second conductive layer made of ITO or the like, the probability of disconnection or the like is reduced, and the yield of the device is improved. Furthermore, since the surface of the second conductive layer is oxidized, interlayer insulation can be reliably ensured.

[0015]

EXAMPLES A method of manufacturing a thin film transistor panel (TFT panel) according to an example of the present invention will be described below. FIG. 1 is a plan view of a TFT panel manufactured by the manufacturing method according to this embodiment at a final stage, FIGS. 2 and 3 are plan views showing a manufacturing process, and FIGS. 4 (A) to 6 (B) are Sectional drawing in each manufacturing process in the AA line of FIG. 1 is shown.

The TFT panel of this embodiment is for a liquid crystal display element, and as shown in FIG.
A number of thin film transistors (TFTs) 13 arranged in a matrix on the transparent substrate 11, a pixel electrode 15 connected to the source electrode SE of the TFT 13, and a gate line 17 connected to the gate electrode GE of the TFT 13. TF
A drain line (data line) 19 connected to the drain electrode DE of T13.

Further, this TFT panel is
A short line 21 is arranged at the edge of the transparent substrate 11 in order to prevent a situation in which a voltage higher than the withstand voltage level is applied to the gate insulating film due to static electricity and dielectric breakdown occurs. A gate pad 23 is formed at the boundary between the short line 21 and the gate line 17, and the short line 21
A drain pad 25 and a gate / drain / contact pad 27 are connected to. The drain line 19 and the gate / drain / contact pad 27 are connected through a contact hole 29. The drain line 19 is connected to the anodizing power supply line 31.

The TFT panel of FIG. 1 is manufactured as shown in FIG.
The broken line is cut, the short line 21 and the anodic oxidation power supply line 31 are removed, the gate line 17 and the drain line 19 are separated, and the manufacturing of the TFT panel is completed.

FIG. 2 shows a method of manufacturing the TFT panel having the above structure.
~ It demonstrates with reference to FIG. 6 (B). First, on a transparent substrate 11 made of glass or the like, aluminum, titanium, chromium,
Metals such as these alloys are deposited by using sputtering, vapor deposition, etc., for example, to a thickness of about 75 nm to 120 nm. Next, this metal layer is patterned to form the gate electrode GE, the gate line 17, the gate pad 23, the short line 21, the drain pad 25, and the gate / drain / contact pad 27 as shown in FIGS. 2 and 4A. To form.

Next, as shown in FIG. 7, the resulting product is an electrolytic solution 73 made of a citric acid solution or the like filled in an electrolytic solution tank 71.
Immerse in the short line 21 and the cathode 7 made of platinum, etc.
5, a voltage is applied from the DC power supply 77, and the gate electrode G
E, the gate line 17, the gate pad 23, the short line 21, the drain pad 25, and the gate / drain / contact pad 27 are anodized, and an anodized film 33 is formed on the surface thereof.

After the anodic oxidation is completed, the anodic oxide film 33 on the gate pad 23, the drain pad 25, and the gate / drain / contact pad 27 is removed. Next, a gate insulating film GI made of silicon oxide or silicon nitride is formed on the entire surface of the substrate by plasma CVD to about 100 to 200.
It is formed by using the (PCVD) method or the like. Gate insulating film GI
An intrinsic semiconductor layer (i-Si) SI made of polycrystalline silicon, amorphous silicon, or the like is formed on the upper surface by a PCVD method or the like to a thickness of about 30 to 70 nm. An insulating layer such as silicon oxide or silicon nitride is formed on the intrinsic semiconductor layer SI.
A PCVD method or the like is deposited to a thickness of -100 nm. next,
A blocking layer BL for protecting the channel region of the TFT from etching etc. by patterning this insulating layer
To form.

Next, an n-type semiconductor layer for ensuring ohmic contact between the intrinsic semiconductor layer SI and the source / drain electrodes SE and DE is formed on the entire surface of the substrate by a PC with a thickness of about several nm.
It is formed using the VD method or the like, and a metal layer of chromium, titanium, or the like is further formed thereon with a thickness of 10 to 200 nm. Next, the n-type semiconductor layer and the metal layer are patterned using the same mask to form the source electrode SE and the drain electrode DE, and the intrinsic semiconductor layer SI is patterned into the element shape. Through the above steps, a structure shown in a cross section in FIG.

Next, the portion of the gate insulating film GI on the gate / drain / contact pad 27 is removed, and the structure shown in FIG.
As shown in (B), a contact hole 35 for connecting the gate / drain contact pad 27 and the drain line 19 is formed.

Next, as shown in FIG.
As shown in (C), an ITO (oxide of indium and tin) film is formed on the entire surface of the substrate to a thickness of, for example, 50 to 200 nm. The ITO film 37 is also formed on the inner surfaces of the gate / drain / contact pad 27 and the contact hole 35. Next, as shown in FIG.
As shown in (C), aluminum, chromium, titanium,
A metal such as these alloys is formed on the entire surface of the substrate with a thickness of
A metal layer 39 is formed by depositing it to a thickness of about 0 nm.

A photoresist 41 is coated on the metal layer 39, and the photoresist 41 is applied thereto by a predetermined photolithography method to form a pixel electrode 15, a drain line 19, an anodic oxidation power supply line 31, a gate / drain / contact pad. Then, patterning is performed in the shape of 27.

The metal layer 39 is etched by using the patterned photoresist 41 as a mask to form the drain line 19, the anodic oxidation power supply line 31, the source / drain / contact layer 43, and the metal layer 4 on the pixel electrode.
5 is formed in the hatched plane in FIG. 3, as shown in the cross section in FIG. 5 (B). At this time, the ITO film 37 functions as an etching stopper. The formed drain line 19, the anodic oxidation power supply line 31, and the source / drain / contact layer 43 are connected to each other, and the metal layer 45 on the pixel electrode formation region is insulated from these metal layers.

The photoresist 41 is removed, and using the remaining metal layer as a mask, as shown in FIG.
The TO film 37 is patterned. After that, a positive voltage is applied to the anodic oxidation power supply line 31 by using the above-described method shown in FIG. 7, and the surface portions of the drain line 19 and the source / drain / contact layer 43 are anodized.
An anodic oxide film 47 is formed as shown in FIG. Pixel electrode 1
The metal layer 45 on 5 is electrically insulated from the anodic oxidation power supply line 31, and the metal layer 45 is not oxidized.

Next, the metal layer 45 is etched. Drain line 19 and source / drain / contact layer 43
Is covered with an anodic oxide film 47 formed by anodic oxidation, and these are not etched. Therefore, as shown in FIG. 6A, only the metal layer 45 on the pixel electrode 15 is removed and the pixel electrode 15 is exposed. Also,
The ITO film 37 remains under the drain line 19,
The drain line 19 has a two-layer structure of ITO and metal,
The probability of disconnection is reduced, and the yield and reliability are improved. Moreover, since the surface of the drain line 19 is anodized, interlayer insulation can be reliably ensured.

Next, as shown in FIG. 6B, an overcoat layer 49 made of a nitride film or the like is deposited on the entire surface of the substrate to a thickness of about 300 to 2000 nm by the PCVD method or the like.
Further, the overcoat layer 49 and the gate insulating film GI on the gate pad 23 and the drain pad 25 are etched and removed to expose the gate pad 23 and the drain pad 25.

As described above, the structure shown in FIG. 1 is obtained. After that, the transparent substrate 11 is cut along the broken line in FIG. 1, the short line 21 and the anodic oxidation power supply line 31 are removed, and the gate line 17 and the drain line 19 are electrically separated to complete the TFT panel.

According to the manufacturing method described above, since the drain line 19 and the pixel electrode 15 are formed by patterning using the same mask, the TFT panel can be manufactured with a small number of masks. Further, the error in mask alignment can be reduced, the pixel electrode 15 and the drain line 19 can be brought close to each other, and the area of the pixel electrode 15 can be increased. In addition, the anodic oxidation of the drain line 19 can reduce interlayer short circuit and improve the yield.

The present invention is not limited to the above embodiment, but various modifications and applications are possible. For example, the material, thickness, forming method, etc. of each layer described in the above embodiment are examples and can be changed. In the above embodiment, the drain pad 2
5 and the gate / drain / contact pad 27 are arranged, the source / drain / contact layer 43 may be used as a drain pad by removing the overcoat layer 49 on the source / drain / contact layer 43, for example. Good. Further, in the above embodiment, the drain of the thin film transistor is connected to the data line (drain line) and the source is connected to the pixel electrode, but the source of the thin film transistor is connected to the data line and the drain is connected to the pixel electrode. Good. Further, the structure of the thin film transistor is not limited to the bottom gate type, and another structure may be adopted.

[0033]

As described above, the TFT of the present invention
According to the panel and its manufacturing method, T
FT panels can be manufactured. Moreover, interlayer short-circuiting can be reduced by anodic oxidation of the drain line, and the yield can be improved.

[Brief description of drawings]

FIG. 1 is a plan view of a TFT panel according to an embodiment of the present invention.

FIG. 2 is a plan view of a TFT panel in a manufacturing process.

FIG. 3 is a plan view of a TFT panel in a manufacturing process.

4A to 4C are cross-sectional views of a TFT panel in the manufacturing process.

5A to 5C are cross-sectional views of a TFT panel in a manufacturing process.

6A and 6B are cross-sectional views of a TFT panel in the manufacturing process.

FIG. 7 is a diagram for explaining a method of anodic oxidation.

FIG. 8 is a plan view of a conventional TFT panel.

9A to 9C are conventional TFTs in a manufacturing process.
It is sectional drawing of a panel.

10A and 10B are conventional TFs in a manufacturing process.
It is sectional drawing of a T panel.

[Explanation of symbols]

11 ... Transparent substrate, 13 ... Thin film transistor (TF
T), 15 ... Pixel electrode, 17 ... Gate line, 19 ...
・ Drain line, 21 ・ ・ ・ Short line, 23 ・ ・ ・ Gate pad, 25 ・ ・ ・ Drain pad, 27 ・ ・ ・ Gate
Drain / contact pad, 29 ... Contact hole, 31 ... Anodizing power supply line, 33 ... Anodized film, 35 ... Contact hole, 37 ... ITO film, 39
... Metal layer, 41 ... Photoresist, 43 ... Source ...
Drain / contact layer, 45 ... Metal layer, 47 ... Anodized film, 49 ... Overcoat layer, 71 ... Electrolyte bath,
73 ... Electrolyte, 75 ... Cathode, 77 ... DC power supply

Claims (4)

[Claims] 1. A substrate, a plurality of thin film transistors formed in a matrix on the substrate, a plurality of gate lines connected to a gate of a corresponding thin film transistor, and a plurality of gate lines connected to one end of a current path of the corresponding thin film transistor. In the method of manufacturing a thin film transistor panel, which comprises a pixel electrode of and a plurality of data lines connected to the other end of the current path of the corresponding thin film transistor, a transparent conductive film for forming a pixel electrode and a metal layer for forming a data line are formed. A step of continuously forming a film, a step of patterning the metal layer into a shape of the pixel electrode and the data line, a step of patterning the transparent conductive film using the remaining metal layer as a mask, A step of oxidizing a surface portion of the data line forming portion of the metal layer to form an oxide film, The method of fabricating a thin film transistor panel comprising: the step of removing the metal layer on the pixel electrode down forming portion while protected by the oxide film. 2. The method of manufacturing a thin film transistor panel according to claim 1, further comprising the step of applying a voltage to the remaining data line forming portion of the metal layer to anodize the surface thereof. 3. A plurality of TFTs each having a gate electrode, a gate insulating film, a semiconductor layer, a source electrode, and a drain electrode.
Forming a matrix on a substrate, forming a transparent conductive film for forming pixel electrodes on the plurality of TFTs, forming a metal layer on the transparent conductive film, and forming the metal layer Patterning into the shapes of the pixel electrode and the data line; patterning the transparent conductive film using the remaining metal layer as a mask; and surface portion of the data line forming part of the remaining metal layer. And a step of removing the metal layer on the pixel electrode while protecting the data line forming portion with the oxide film. 4. A substrate, a plurality of thin film transistors formed in a matrix on the substrate, a plurality of gate lines connected to the gates of the corresponding thin film transistors, and one end of a current path of the corresponding thin film transistors,
A plurality of pixel electrodes made of a transparent conductive material; and a plurality of data lines connected to the other end of the current path of the corresponding thin film transistor, each of the data lines being a first electrode made of the transparent conductive material. And a second conductive layer formed on the first conductive layer and formed of a metal whose surface is oxidized, the thin film transistor panel.