JPS6180346A - 入出力制御装置 - Google Patents

入出力制御装置

Info

Publication number
JPS6180346A
JPS6180346A JP59201018A JP20101884A JPS6180346A JP S6180346 A JPS6180346 A JP S6180346A JP 59201018 A JP59201018 A JP 59201018A JP 20101884 A JP20101884 A JP 20101884A JP S6180346 A JPS6180346 A JP S6180346A
Authority
JP
Japan
Prior art keywords
priority
interrupt
input
output
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59201018A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0340416B2 (enExample
Inventor
Hidehiko Tanaka
英彦 田中
Akihiro Hayakawa
早川　顕宏
Yukio Taniyama
行生 谷山
Yoichi Takahashi
陽一 高橋
Yoshifumi Oba
大場　善文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59201018A priority Critical patent/JPS6180346A/ja
Publication of JPS6180346A publication Critical patent/JPS6180346A/ja
Publication of JPH0340416B2 publication Critical patent/JPH0340416B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • G06F13/26—Handling requests for interconnection or transfer for access to input/output bus using interrupt with priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
JP59201018A 1984-09-26 1984-09-26 入出力制御装置 Granted JPS6180346A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59201018A JPS6180346A (ja) 1984-09-26 1984-09-26 入出力制御装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59201018A JPS6180346A (ja) 1984-09-26 1984-09-26 入出力制御装置

Publications (2)

Publication Number Publication Date
JPS6180346A true JPS6180346A (ja) 1986-04-23
JPH0340416B2 JPH0340416B2 (enExample) 1991-06-18

Family

ID=16434103

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59201018A Granted JPS6180346A (ja) 1984-09-26 1984-09-26 入出力制御装置

Country Status (1)

Country Link
JP (1) JPS6180346A (enExample)

Also Published As

Publication number Publication date
JPH0340416B2 (enExample) 1991-06-18

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