JPS6179558U - - Google Patents
Info
- Publication number
- JPS6179558U JPS6179558U JP16367984U JP16367984U JPS6179558U JP S6179558 U JPS6179558 U JP S6179558U JP 16367984 U JP16367984 U JP 16367984U JP 16367984 U JP16367984 U JP 16367984U JP S6179558 U JPS6179558 U JP S6179558U
- Authority
- JP
- Japan
- Prior art keywords
- printed wiring
- wiring board
- substrate
- grooves
- groove
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims 4
Landscapes
- Structure Of Printed Boards (AREA)
Description
第１図は本考案の印刷配線基板の一実施例を示
す平面図、第２図は第１図の−線に沿う縦断
面図、第３図は従来の印刷配線基板を示す平面図
、第４図は第３図の−線に沿う縦断面図であ
る。
１…親基板、２…スリツト、６…Ｖカツト止め
目印、７，８…凹溝、９ａ，９ｂ…円孔。
FIG. 1 is a plan view showing an embodiment of the printed wiring board of the present invention, FIG. 2 is a vertical sectional view taken along the line - in FIG. 1, and FIG. FIG. 4 is a longitudinal sectional view taken along the - line in FIG. 3. DESCRIPTION OF SYMBOLS 1... Parent board, 2... Slit, 6... V-cut stop mark, 7, 8... Concave groove, 9a, 9b... Circular hole.
Claims (1)
する凹溝を形成し、この凹溝を分割線として複数
の分割基板を得るよう構成された印刷配線基板に
おいて、前記形成すべき凹溝の延長線上に、一定
間隔をおいて凹溝加工の終了位置を示す目印を形
成したことを特徴とする印刷配線基板。 (2) 目印は、金型により打ち抜かれた透孔であ
る実用新案登録請求の範囲第１項記載の印刷配線
基板。[Claims for Utility Model Registration] (1) Printed wiring configured to form grooves on a parent substrate to divide the parent substrate into a plurality of areas, and to obtain a plurality of divided substrates using the grooves as dividing lines. 1. A printed wiring board, characterized in that marks are formed on the substrate at regular intervals on an extension line of the groove to be formed, indicating the end position of groove processing. (2) The printed wiring board according to claim 1, wherein the mark is a hole punched by a mold.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16367984U JPS6179558U (en) | 1984-10-31 | 1984-10-31 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16367984U JPS6179558U (en) | 1984-10-31 | 1984-10-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6179558U true JPS6179558U (en) | 1986-05-27 |
Family
ID=30721539
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16367984U Pending JPS6179558U (en) | 1984-10-31 | 1984-10-31 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6179558U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5931091A (en) * | 1982-08-12 | 1984-02-18 | 三菱電機株式会社 | Hybrid integrated circuit device |
-
1984
- 1984-10-31 JP JP16367984U patent/JPS6179558U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5931091A (en) * | 1982-08-12 | 1984-02-18 | 三菱電機株式会社 | Hybrid integrated circuit device |