JPS617129U - Charge dump circuit - Google Patents

Charge dump circuit

Info

Publication number
JPS617129U
JPS617129U JP9275184U JP9275184U JPS617129U JP S617129 U JPS617129 U JP S617129U JP 9275184 U JP9275184 U JP 9275184U JP 9275184 U JP9275184 U JP 9275184U JP S617129 U JPS617129 U JP S617129U
Authority
JP
Japan
Prior art keywords
dump circuit
charge
main body
operational amplifier
performs
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9275184U
Other languages
Japanese (ja)
Inventor
繁光 水川
Original Assignee
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to JP9275184U priority Critical patent/JPS617129U/en
Publication of JPS617129U publication Critical patent/JPS617129U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】 第1図は従来のチャージ・ダンプ回路を示す図、第2図
はこの考案の一実施、例によるチャージ・ダンプ回路を
示す図、第3図は第1図の回路を鋸歯状波発生回路とし
て動作させた時の出力端子波形図、第4図は第2図の回
路を鋸歯状波発生回路として動作させた時の出力端子波
形図、第−5図は入力信号がMSK波形である時の第2
図の回路の各部の波形を示す図である。 1・・・入力端子、2・・・抵抗、3・・・演算増幅器
、4 −,0,41・・・チャージ・ダンプ用コン
デンサ、50,51・・・チャージ・ダンプ回路切換用
スイツチ,,20.21・・・第1、第2のチャージ・
ダンプ回路本体、6・・・出力端子。 なお図中、同一符号は同一又は相当部分を示す。
[BRIEF DESCRIPTION OF THE DRAWINGS] FIG. 1 is a diagram showing a conventional charge dump circuit, FIG. 2 is a diagram showing a charge dump circuit according to an embodiment of this invention, and FIG. 3 is a diagram showing the circuit of FIG. 1. Figure 4 is an output terminal waveform diagram when the circuit in Figure 2 is operated as a sawtooth wave generation circuit, Figure 5 is an output terminal waveform diagram when the circuit in Figure 2 is operated as a sawtooth wave generation circuit, and Figure 5 is the input signal. The second when is an MSK waveform
FIG. 3 is a diagram showing waveforms of various parts of the circuit shown in the figure. 1... Input terminal, 2... Resistor, 3... Operational amplifier, 4 -, 0, 41... Capacitor for charge/dump, 50, 51... Switch for switching charge/dump circuit,, 20.21...First and second charges
Dump circuit main body, 6...output terminal. In the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 抵抗を介して入力される入力信号を増幅するための傳算
増幅器と、コイデンサと該コンデンサの両端を短絡また
は開放するだめのスイッチとからなり上記演算増幅器の
入出力間に接続された第1のチャージーダンプ回路本体
と、該チャージ・ダンプ回路本体と同一構成になり同じ
く上記演算増幅器の入出力間に接続された第2のチャー
ジ・ダンプ回路本体とを備え、上記第1、第2のチャー
ジ●タヱプ回路本体のスイッチは該両チャージ●ダンプ
回路本体の一方がチャージ動作の時他方がダンプ動作を
行なうよう切換動作を行なうものであることを特徴とす
るチャージ・ダンプ回路。
A first operational amplifier, which is connected between the input and output of the operational amplifier, is composed of an operational amplifier for amplifying an input signal inputted through a resistor, and a switch for shorting or opening both ends of the co-capacitor and the capacitor. A charge dump circuit main body, and a second charge dump circuit main body having the same configuration as the charge dump circuit main body and also connected between the input and output of the operational amplifier, A charge/dump circuit characterized in that a switch on the main body of the type dump circuit performs a switching operation so that when one of the main bodies of the charge/dump circuit performs a charging operation, the other performs a dumping operation.
JP9275184U 1984-06-19 1984-06-19 Charge dump circuit Pending JPS617129U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9275184U JPS617129U (en) 1984-06-19 1984-06-19 Charge dump circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9275184U JPS617129U (en) 1984-06-19 1984-06-19 Charge dump circuit

Publications (1)

Publication Number Publication Date
JPS617129U true JPS617129U (en) 1986-01-17

Family

ID=30649822

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9275184U Pending JPS617129U (en) 1984-06-19 1984-06-19 Charge dump circuit

Country Status (1)

Country Link
JP (1) JPS617129U (en)

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