JPS6142660U - double integrator circuit - Google Patents

double integrator circuit

Info

Publication number
JPS6142660U
JPS6142660U JP12531384U JP12531384U JPS6142660U JP S6142660 U JPS6142660 U JP S6142660U JP 12531384 U JP12531384 U JP 12531384U JP 12531384 U JP12531384 U JP 12531384U JP S6142660 U JPS6142660 U JP S6142660U
Authority
JP
Japan
Prior art keywords
integration
resistor
double
integrator circuit
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12531384U
Other languages
Japanese (ja)
Inventor
春喜 山家
信孝 石垣
睦雄 片岡
Original Assignee
沖電気工業株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 沖電気工業株式会社 filed Critical 沖電気工業株式会社
Priority to JP12531384U priority Critical patent/JPS6142660U/en
Publication of JPS6142660U publication Critical patent/JPS6142660U/en
Pending legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案の二重積分回路の第1の実施例を示す
回路図、第2図は上記第1の実施例の各部の波形図、第
3図は従来の二重積分型A/D変換器を示す回路図、第
4図は第3図のA/D変換、器の各部の波形図、第5図
はこの考案の第2の実−施例を示す回路図である。 21.22・・・スイッチ、23・・・・・・バツファ
アンプ、24.25・・・スイッチ、26・・・第1積
分抵抗、27・・・第2積分抵抗、28・・・コンデン
サ、29・・・積分アンプ、30・・・積分コンデンサ
FIG. 1 is a circuit diagram showing a first embodiment of the double integration circuit of this invention, FIG. 2 is a waveform diagram of each part of the first embodiment, and FIG. 3 is a conventional double integration type A/ FIG. 4 is a circuit diagram showing the A/D converter shown in FIG. 3, and waveform diagrams of various parts of the device. FIG. 5 is a circuit diagram showing a second embodiment of the invention. 21.22... Switch, 23... Buffer amplifier, 24.25... Switch, 26... First integrating resistor, 27... Second integrating resistor, 28... Capacitor, 29 ... Integrating amplifier, 30... Integrating capacitor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 積分コレデンサを充電する第1積分と、この第1積分で
充電した電荷を放電する第2積分とで積分抵抗を切換え
るようにした二重積分回路において、上記各積分抵抗に
直列に接続される積分抵抗切換用の第1および第2のス
イッチの前記積分抵抗側の端相互間に、積分アンプの周
波数特性による出力の遅れを補正するためのコンデンサ
を接続−シたことを特徴とする二重積分回路。
In a double integration circuit in which the integration resistor is switched between the first integration for charging the integration correductor and the second integration for discharging the charge charged in the first integration, the integration resistor is connected in series to each of the above-mentioned integration resistors. A double integration device characterized in that a capacitor for correcting an output delay due to the frequency characteristics of an integrating amplifier is connected between the ends of the first and second resistor switching switches on the integrating resistor side. circuit.
JP12531384U 1984-08-20 1984-08-20 double integrator circuit Pending JPS6142660U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12531384U JPS6142660U (en) 1984-08-20 1984-08-20 double integrator circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12531384U JPS6142660U (en) 1984-08-20 1984-08-20 double integrator circuit

Publications (1)

Publication Number Publication Date
JPS6142660U true JPS6142660U (en) 1986-03-19

Family

ID=30684002

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12531384U Pending JPS6142660U (en) 1984-08-20 1984-08-20 double integrator circuit

Country Status (1)

Country Link
JP (1) JPS6142660U (en)

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