JPS5952480U - Duty/voltage conversion circuit - Google Patents

Duty/voltage conversion circuit

Info

Publication number
JPS5952480U
JPS5952480U JP14825882U JP14825882U JPS5952480U JP S5952480 U JPS5952480 U JP S5952480U JP 14825882 U JP14825882 U JP 14825882U JP 14825882 U JP14825882 U JP 14825882U JP S5952480 U JPS5952480 U JP S5952480U
Authority
JP
Japan
Prior art keywords
duty
voltage conversion
conversion circuit
resistor
variable resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14825882U
Other languages
Japanese (ja)
Inventor
西山 周二
橋川 健三
Original Assignee
富士通テン株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士通テン株式会社 filed Critical 富士通テン株式会社
Priority to JP14825882U priority Critical patent/JPS5952480U/en
Publication of JPS5952480U publication Critical patent/JPS5952480U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来技術を示す回路図、第2図c1周波数信号
を示す薗、第3図はデユーティに対応する出力電圧を示
すグラフ、第4図は本考案の一実施例の回路図である。 1・・・入力端子、2・・・電源端子、3・・・出力端
子、4・・・接続点、VRI、VR2・・・可変抵抗、
R3゜R4・・・抵抗、C・・・コンデンサ。
Fig. 1 is a circuit diagram showing the prior art, Fig. 2 is a diagram showing the c1 frequency signal, Fig. 3 is a graph showing the output voltage corresponding to the duty, and Fig. 4 is a circuit diagram of an embodiment of the present invention. . 1... Input terminal, 2... Power supply terminal, 3... Output terminal, 4... Connection point, VRI, VR2... Variable resistor,
R3゜R4...Resistor, C...Capacitor.

Claims (1)

【実用新案登録請求の範囲】 一定周期の周波数信号のデューテ′イに応じた電圧を出
力するようにしたデユーティ・電圧変換回路において、 電源端子には、前記周波数信号によってスイッチング態
様が制御される半導体スイッチング素子、可変抵抗およ
び抵抗が直列に接続され、半導体スイッチング素子およ
び前記可変抵抗から成る直列回路には他の可変抵抗が並
列に接続され、両可変抵抗の接続点は他の抵抗およびコ
ンデンサを介して出力端子に接続されることを特徴とす
るデユーティ・電圧変換回路。 。
[Claims for Utility Model Registration] In a duty/voltage conversion circuit configured to output a voltage according to the duty of a frequency signal with a constant period, a semiconductor whose switching mode is controlled by the frequency signal is connected to the power supply terminal. A switching element, a variable resistor, and a resistor are connected in series, and another variable resistor is connected in parallel to the series circuit consisting of the semiconductor switching element and the variable resistor, and the connection point of both variable resistors is connected through the other resistor and capacitor. A duty/voltage conversion circuit characterized in that the circuit is connected to an output terminal. .
JP14825882U 1982-09-29 1982-09-29 Duty/voltage conversion circuit Pending JPS5952480U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14825882U JPS5952480U (en) 1982-09-29 1982-09-29 Duty/voltage conversion circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14825882U JPS5952480U (en) 1982-09-29 1982-09-29 Duty/voltage conversion circuit

Publications (1)

Publication Number Publication Date
JPS5952480U true JPS5952480U (en) 1984-04-06

Family

ID=30329448

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14825882U Pending JPS5952480U (en) 1982-09-29 1982-09-29 Duty/voltage conversion circuit

Country Status (1)

Country Link
JP (1) JPS5952480U (en)

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