JPS6125657U - Function generation circuit - Google Patents

Function generation circuit

Info

Publication number
JPS6125657U
JPS6125657U JP10637884U JP10637884U JPS6125657U JP S6125657 U JPS6125657 U JP S6125657U JP 10637884 U JP10637884 U JP 10637884U JP 10637884 U JP10637884 U JP 10637884U JP S6125657 U JPS6125657 U JP S6125657U
Authority
JP
Japan
Prior art keywords
input terminal
resistor
inverting input
ground
series
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10637884U
Other languages
Japanese (ja)
Inventor
靖博 荒井
伸次 萩原
Original Assignee
富士電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士電機株式会社 filed Critical 富士電機株式会社
Priority to JP10637884U priority Critical patent/JPS6125657U/en
Publication of JPS6125657U publication Critical patent/JPS6125657U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示す回路因、第2図は第1
図に示した実施例の動作特性を示す説明図、第3図は従
来の関数発生回路を示す回路口、第4図は第3図に示し
た従来の回路の動作特注を示す説明図、てある。 符号説明、OP,OPI,OP2・・・・・・演算増幅
器(コンパレータ)、R1〜R4・曲・抵抗、D1.D
・ 2・・・・・・クイオード、■i・・・・・・入力
電圧、VO・・・・・・出力電圧、V1.V2・・・・
・・設定電圧、\・OP・・・・・・演算増幅器の正の
飽和電工。
Figure 1 shows the circuit diagram of one embodiment of the present invention, and Figure 2 shows the circuit diagram of the first embodiment.
FIG. 3 is an explanatory diagram showing the operating characteristics of the embodiment shown in the figure. FIG. 3 is a circuit diagram showing a conventional function generating circuit. FIG. be. Explanation of symbols, OP, OPI, OP2... operational amplifier (comparator), R1 to R4/bending/resistance, D1. D
・2...Quiode, ■i...Input voltage, VO...Output voltage, V1. V2...
・・Set voltage, \・OP・・・・・・Positive saturation voltage of operational amplifier.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力信号に対して、それと関数関係にある出力信号を出
力する関数発生回路であって、入力信号の入力端子を第
1の抵抗と第2の抵抗の直列接続を介してアースに導く
と共に、前記入力端子を第3の抵抗を介して演算増幅器
の反転入力端子に接続し、前記第1の抵抗と第2の抵抗
の接続点を前記演算増幅器の非反転入力端子に接続し、
かつ前記反転入力端子を、第4の抵抗を介して前記演算
増幅器の出力側に接続すると共に、該反転入力端子とア
ースの間に、第1のダイオードと第1の設定電源の直列
接続から成る第1の直列回路を接続し、かつ第2のタイ
オードと第2の設定電源の直列接続から成る第2の直列
回路を前記非反転入力端子とアースの間に、前記第1の
直列回路とは極性が逆になるように、接続して成ること
を特徴とする関数発生回路。
A function generating circuit that outputs an output signal having a functional relationship with an input signal, the input terminal of the input signal being connected to the ground through a series connection of a first resistor and a second resistor, and an input terminal connected to an inverting input terminal of an operational amplifier via a third resistor, and a connection point between the first resistor and the second resistor connected to a non-inverting input terminal of the operational amplifier;
and the inverting input terminal is connected to the output side of the operational amplifier via a fourth resistor, and a first diode and a first setting power source are connected in series between the inverting input terminal and ground. A first series circuit is connected between the non-inverting input terminal and the ground, and a second series circuit consisting of a series connection of a second diode and a second setting power source is connected between the non-inverting input terminal and the ground. A function generating circuit characterized in that the circuits are connected so that the polarities are reversed.
JP10637884U 1984-07-16 1984-07-16 Function generation circuit Pending JPS6125657U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10637884U JPS6125657U (en) 1984-07-16 1984-07-16 Function generation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10637884U JPS6125657U (en) 1984-07-16 1984-07-16 Function generation circuit

Publications (1)

Publication Number Publication Date
JPS6125657U true JPS6125657U (en) 1986-02-15

Family

ID=30665671

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10637884U Pending JPS6125657U (en) 1984-07-16 1984-07-16 Function generation circuit

Country Status (1)

Country Link
JP (1) JPS6125657U (en)

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