JPS5946014U - Transistor parallel connection circuit - Google Patents

Transistor parallel connection circuit

Info

Publication number
JPS5946014U
JPS5946014U JP13932882U JP13932882U JPS5946014U JP S5946014 U JPS5946014 U JP S5946014U JP 13932882 U JP13932882 U JP 13932882U JP 13932882 U JP13932882 U JP 13932882U JP S5946014 U JPS5946014 U JP S5946014U
Authority
JP
Japan
Prior art keywords
parallel connection
connection circuit
transistor parallel
transistor
parallel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13932882U
Other languages
Japanese (ja)
Inventor
古畑 昌一
進 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP13932882U priority Critical patent/JPS5946014U/en
Publication of JPS5946014U publication Critical patent/JPS5946014U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図a、  bは従来例を示す回路図、第2図は従来
例によるコレクタ電流の変化を示すグラフ、 ゛第3図
はこの考案の一実施例を示す回路図、第4図はこの考案
によるコレクタ電流及びコレクタ電圧の変化を示すグラ
フ、第5図はこの考案の他の実施例を示す回路図である
。 1.2.7・・・・・・トランジスタ、3. 4. 6
・・・・・・抵L 5・・・・・・コンデンサ。
Figures 1a and b are circuit diagrams showing a conventional example, Figure 2 is a graph showing changes in collector current according to the conventional example, Figure 3 is a circuit diagram showing an embodiment of this invention, and Figure 4 is a circuit diagram showing this example. A graph showing changes in collector current and collector voltage according to the invention, and FIG. 5 is a circuit diagram showing another embodiment of the invention. 1.2.7...transistor, 3. 4. 6
...Resistor L5...Capacitor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 少なくとも2つのトランジスタを並列接続する′ものに
おいて、該トランジスタのベース・フレフタ間にコンデ
ンサと抵抗を直列接続することを特徴とするトランジス
タ並列接続回路。
1. A transistor parallel connection circuit in which at least two transistors are connected in parallel, characterized in that a capacitor and a resistor are connected in series between the base and the flexor of the transistor.
JP13932882U 1982-09-14 1982-09-14 Transistor parallel connection circuit Pending JPS5946014U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13932882U JPS5946014U (en) 1982-09-14 1982-09-14 Transistor parallel connection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13932882U JPS5946014U (en) 1982-09-14 1982-09-14 Transistor parallel connection circuit

Publications (1)

Publication Number Publication Date
JPS5946014U true JPS5946014U (en) 1984-03-27

Family

ID=30312322

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13932882U Pending JPS5946014U (en) 1982-09-14 1982-09-14 Transistor parallel connection circuit

Country Status (1)

Country Link
JP (1) JPS5946014U (en)

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